The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering ECE122 – Lab 6 Multiplexers,

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Presentation transcript:

The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering ECE122 – Lab 6 Multiplexers, Parity Generators and other Boolean functions using MUX Jason Woytowich Ritu Bajpai Last revised on October 8, 2007

Multiplexers (Review) ● A multiplexer has n select lines, 2 n inputs and 1 output. ● The number represented by the select lines chooses one of the inputs to be placed on the output.

4X1 Multiplexer X1 X2 X3 X4 S1S2 O

Homework from last lab... You were supposed to ● Build and test a 2x1 multiplexer. ● Build a 4x1 multiplexer from your 2x1 multiplexer. Test and layout.

Application of multiplexers ● Now we are ready to learn the application of multiplexers to make useful circuits like parity generator and adder.

Parity Generator (Lab Exercise) ● Build a circuit that determines if the number of inputs that are high is even or odd. ● 3-bits using a 4x1 multiplexer. ● You have to do the layout and simulate your extracted layout. You may simulate your schematic to check its correctness but schematic simulation is not mandatory for this lab exercise.

Results and Analysis ● Test (from the layout simulation) your parity generator for all possible combinations of 3 bit input. ● Show the output waveforms (from the layout simulation) for the above test in your lab report. ● What is the application of a parity generator?

Homework ● Implement a 1-Bit full adder using a 4x1 multiplexer. ● Layout your adder and simulate from extracted layout. ● You should test your circuit (from layout simulation) for all possible combinations of input.