Protection of 600 A bus bars, follow up W. Venturini Delsolaro and A. Verweij MPP meeting, 17/10/2006

Outline Experiment on bad splices, results Arjan’s simulations Conclusions

Tailored “bad splices” Three “steel” samples: 0.4 µΩ, 1 µΩ and 3 µΩ Polyimide insulated

Test Setup

V-I characteristics

Quench currents

Quench signals, propagation

“Indium” samples Initial resistance of the order of 1 mΩ Protection on nearby portion of cable History dependent V-I characteristics Up to 35 W injected in the 1.9 K He bath No quench below 200 A: confirmed the “cryostable” region But something happened to the samples….

Molten indium (156˚C)

Conclusions from the experiment 2-3 µΩ : quench limit at nominal current Huge temperature gradients can exist below 200 A, with no quench propagation Our mΩ-ish samples would have crossed the 100 mV threshold well below 200 A! Moreover, the insulation conditions of B4 samples were different from those in the machine Although it was interesting to have an experimental benchmark, we had to turn to simulations for the real assessment

dI/dt=10 A/s, Vthres=100 mV, Rjoint=100 μΩ

Arjan's simulations, conclusions For the LHC hardware commissioning of the 600 A corrector circuits the following change of the settings for quench protection is asked for: an increase in the intermediate current I int from 20 A to 30 A and preferably 50 A, an increase in the threshold voltage above I int from 20 mV to 100 mV, an increase in the discrimination time from 10 ms to 20 ms. The simulations presented in this memo show clearly that the 600 A bus is safely protected for all these settings under the restrictions of a bus geometry as given in section 2. This conclusion holds for any ramp rate, for RRR values between 70 and 200, and for joint resistances up to 20 mΩ.

Proposed Recommendation 2 V detection threshold for |I| < 50 A 100 mV for |I| ≥ 50 A PM analysis of PCC (10 A) flat tops before going ahead, to detect “really sick” circuits Keep PCS step, simplified