FPGA Field Programmable Gate Arrays Shiraz University of shiraz spring 2012.

Slides:



Advertisements
Similar presentations
All Programmable FPGAs, SoCs, and 3D ICs
Advertisements

Field Programmable Gate Array
ENEL111 Digital Electronics
VHDL - I 1 Digital Systems. 2 «The designer’s guide to VHDL» Peter J. Andersen Morgan Kaufman Publisher Bring laptop with installed Xilinx.
Xilinx CPLDs and FPGAs Module F2-1. CPLDs and FPGAs XC9500 CPLD XC4000 FPGA Spartan FPGA Spartan II FPGA Virtex FPGA.
Survey of Reconfigurable Logic Technologies
University Of Vaasa Telecommunications Engineering Automation Seminar Signal Generator By Tibebu Sime 13 th December 2011.
EELE 367 – Logic Design Module 2 – Modern Digital Design Flow Agenda 1.History of Digital Design Approach 2.HDLs 3.Design Abstraction 4.Modern Design Steps.
Spring 2009W. Rhett DavisNC State UniversityECE 406Slide 1 ECE 406 – Design of Complex Digital Systems Lecture 1: Introduction Spring 2009 W. Rhett Davis.
EECE579: Digital Design Flows
Embedded Systems: Introduction. Course overview: Syllabus: text, references, grading, etc. Schedule: will be updated regularly; lectures, assignments.
FPGA chips and DSP Algorithms By Emily Fabes. 2 Agenda FPGA Background Reasons to use FPGA’s Advantages and disadvantages of using FPGA’s Sample VHDL.
The Spartan 3e FPGA. CS/EE 3710 The Spartan 3e FPGA  What’s inside the chip? How does it implement random logic? What other features can you use?  What.
Introduction to Field Programmable Gate Arrays (FPGAs) COE 203 Digital Logic Laboratory Dr. Aiman El-Maleh College of Computer Sciences and Engineering.
February 4, 2002 John Wawrzynek
ECE 331 – Digital System Design Tristate Buffers, Read-Only Memories and Programmable Logic Devices (Lecture #16) The slides included herein were taken.
EET 1131 Unit 4 Programmable Logic Devices  Read Kleitz, Chapter 4.  Homework #4 and Lab #4 due next week.  Quiz next week.
Physical Implementation 1)Manufactured Integrated Circuit (IC) Technologies 2)Programmable IC Technology 3)Other Technologies Manufactured IC Technologies.
Programmable Array Logic (PAL) Fixed OR array programmable AND array Fixed OR array programmable AND array Easy to program Easy to program Poor flexibility.
Introduction to FPGA’s FPGA (Field Programmable Gate Array) –ASIC chips provide the highest performance, but can only perform the function they were designed.
Field Programmable Gate Array (FPGA) Layout An FPGA consists of a large array of Configurable Logic Blocks (CLBs) - typically 1,000 to 8,000 CLBs per chip.
General FPGA Architecture Field Programmable Gate Array.
EET 252 Unit 5 Programmable Logic: FPGAs & HDLs  Read Floyd, Sections 11-5 to  Study Unit 5 e-Lesson.  Do Lab #5.  Lab #5a due next week. 
EKT303/4 PRINCIPLES OF PRINCIPLES OF COMPUTER ARCHITECTURE (PoCA)
CSET 4650 Field Programmable Logic Devices Dan Solarek Introduction to PLDs.
Unit 9 Multiplexers, Decoders, and Programmable Logic Devices
1 3-General Purpose Processors: Altera Nios II 2 Altera Nios II processor A 32-bit soft core processor from Altera Comes in three cores: Fast, Standard,
EGRE 427 Advanced Digital Design Figures from Application-Specific Integrated Circuits, Michael John Sebastian Smith, Addison Wesley, 1997 Chapter 4 Programmable.
Ch.9 CPLD/FPGA Design TAIST ICTES Program VLSI Design Methodology Hiroaki Kunieda Tokyo Institute of Technology.
Introduction to Programmable Logic Devices John Coughlan RAL Technology Department Electronics Division.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals Tenth Edition Floyd.
Electronics in High Energy Physics Introduction to Electronics in HEP Field Programmable Gate Arrays Part 1 based on the lecture of S.Haas.
System Arch 2008 (Fire Tom Wada) /10/9 Field Programmable Gate Array.
CPLD (Complex Programmable Logic Device)
1 Moore’s Law in Microprocessors Pentium® proc P Year Transistors.
J. Christiansen, CERN - EP/MIC
FPGA (Field Programmable Gate Array): CLBs, Slices, and LUTs Each configurable logic block (CLB) in Spartan-6 FPGAs consists of two slices, arranged side-by-side.
Galen SasakiEE 260 University of Hawaii1 Electronic Design Automation (EDA) EE 260 University of Hawaii.
Programmable Logic Devices
Introduction to FPGA Created & Presented By Ali Masoudi For Advanced Digital Communication Lab (ADC-Lab) At Isfahan University Of technology (IUT) Department.
STMIK Jakarta STI&K, Jakarta - September Designing Image Processing Component using FPGA Device By : Sunny Arief Sudiro.
Lecture #3 Page 1 ECE 4110–5110 Digital System Design Lecture #3 Agenda 1.FPGA's 2.Lab Setup Announcements 1.HW#2 assigned Due.
ECE 3110: Introduction to Digital Systems Introduction (Contd.)
ECE 3110: Introduction to Digital Systems Introduction (Contd.)
Spring 2007 W. Rhett Davis with minor editing by J. Dean Brock UNCA ECE Slide 1 ECE 406 – Design of Complex Digital Systems Lecture 1: Introduction.
EKT303/4 PRINCIPLES OF PRINCIPLES OF COMPUTER ARCHITECTURE (PoCA)
FPGA Based System Design
1 Leakage Power Analysis of a 90nm FPGA Authors: Tim Tuan (Xilinx), Bocheng Lai (UCLA) Presenter: Sang-Kyo Han (ECE, University of Maryland) Published.
FPGA-Based System Design: Chapter 1 Copyright  2004 Prentice Hall PTR Moore’s Law n Gordon Moore: co-founder of Intel. n Predicted that number of transistors.
Programmable Logic Device Architectures
CEC 220 Digital Circuit Design Programmable Logic Devices
Delivered by.. Love Jain p08ec907. Design Styles  Full-custom  Cell-based  Gate array  Programmable logic Field programmable gate array (FPGA)
VHDL From Ch. 5 Hardware Description Languages. History 1980’s Schematics 1990’s Hardware Description Languages –Increased due to the use of Programming.
Thinning Lines Between Software and Hardware Programmable Logic Devices Adam Foust.
Introduction to Field Programmable Gate Arrays (FPGAs) EDL Spring 2016 Johns Hopkins University Electrical and Computer Engineering March 2, 2016.
FPGA ( Field programmable gate array ) April 2008 Prepared by : Muhammad Ziyada Muhammad Al tabakh.
A Brief Introduction to FPGAs
FPGA Technology Overview Carl Lebsack * Some slides are from the “Programmable Logic” lecture slides by Dr. Morris Chang.
Introduction to the FPGA and Labs
ETE Digital Electronics
Programmable Logic Devices
Sequential Programmable Devices
Programmable Logic Device Architectures
Introduction to VLSI ASIC Design and Technology
ELEN 468 Advanced Logic Design
Field Programmable Gate Array
Field Programmable Gate Array
Field Programmable Gate Array
Getting Started with Programmable Logic
Programmable logic and FPGA
Presentation transcript:

FPGA Field Programmable Gate Arrays Shiraz University of shiraz spring 2012

Digital Design Today Complex systems are built using: -ASIC’s -Microcontrollers -FPGA’s -Combination of above Shiraz University of shiraz spring 2012

System on Chip - A typical ASIC chip today contains many subsystems, and performs very complex tasks. - FPGA’s are also becoming big enough to contain a whole complex system. Shiraz University of shiraz spring 2012

Micro-controller A microcontroller is a general-purpose VLSI chip containing a small microprocessor, a small amount of memory and very limited I/O capability. Shiraz University of shiraz spring 2011

FPGA A Field Programmable Gate Array (FPGA) is a VLSI chip containing a large uniform array of Configurable Logic Blocks (CLB’s) that can be programmed to perform a user-defined task. Shiraz University of shiraz spring 2011

FPGA Structure

FPGA CLB

FPGA Look up Table Combinatorial logic is stored in 16x1 SRAM Look-Up Tables (LUT’s) in a CLB. Shiraz University of shiraz spring 2011

FPGA vs. Asic s -FPGA  They are pre-manufactured. So no need to worry (much) about physical IC design.  No fabrication time. So they are faster to develop  The non-recurring engineering cost of an FPGA design is much lower than that of an ASIC. -ASICs  They are custom-designed for your system  Generally lower power consumption and faster clock rate.  Require physical design and fabrication(very expensive)  Components are much cheaper in large production runs  Engineering costs are much higher Shiraz University of shiraz spring 2011

FPGA vs. Asic s vs. μ P

FPGA Design Methodology

Hardware Description Language Two major HDL’s:  VHDL  standardized by IEEE in 1987,1993, 2002, 2006  object-oriented, very widely used  Verilog  standardized by IEEE in 1995, 2001, 2005  has concise syntax like C Shiraz University of shiraz spring 2011

VHDL Example A Multiplier Program in VHDL Shiraz University of shiraz spring 2011

Verilog Example A Multiplier Program in Verilog Shiraz University of shiraz spring 2011

Simulation Shiraz University of shiraz spring 2011

Test & Debug XSA-40 FPGA Development board from XESS Inc Shiraz University of shiraz spring 2011

Important FPGA Manufacturers  Xilinx (  Altera (  Actel (  QuickLogic (  Lattice Semiconductor ( Shiraz University of shiraz spring 2011

FPGA Applications Shiraz University of shiraz spring 2011

Conclusion  FPGA’s are becoming faster, denser and more capable  Using FPGA’s where it makes sense can reduce design costs and total system costs.  Use FPGA’s when:  parallelism is possible  speed matters  Integration and reliability are important Shiraz University of shiraz spring 2011