CPUz 4 n00bz

CPU Diagram Program Cache Counter (PC) RAM (Memory) Instruction Control Unit (CU) Program Counter (PC) Cache Address Bus Instruction Register (IR) Decoder Arithmetic Logic Unit (ALU) Data Bus Accumulator

Additional CPU Components Program counter (PC) Holds the address of the next instruction in the program sequence Instruction register Holds the operation code of the type of instruction to be executed (e.g. ADD, SUB) Accumulator ALU’s internal register that holds ongoing total

Fetch-Execute Again Fetch instruction from the address stored in the program counter Store instruction in instruction register Decode instruction register Execute operation (control unit tells ALU what to do) ALU performs operation and uses its accumulator to remember result Store accumulator result back to memory

What happens when we need to pause the fetch-execute cycle? Interrupts! Things that “interrupt” the processor’s normal operation Handle events and exceptions Keyboard input Null pointer exception etc. Special code exists to handle instructions, which is also stored in RAM

Interrupt Register Stores the offset address of the special interrupt handling code Interrupt Code Address = Base Address + Interrupt Register Basically…it stores the location in memory of where you go to handle the interrupt

Processor Optimizations Pipelining Fetch-execute cycle overlapping for multiple instructions

Instruction Pipelining

More Cool Optimizations Multiprocessing Dual-core and Quad-core processors Cell processor has 8 processors! http://upload.wikimedia.org/wikipedia/en/d/da/Cell_Broadband_Engine_Processor.jpg