Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 1 Status of.

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Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 1 Status of 3D detector activities at CNM Status of 3D detector activities at CNM Giulio Pellegrini RD50 funded project

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 2 Outline Processes under fabrication New process to get thin 3D detectors with biasing on the back surface. Planar detectors activity at CNM. New developments in LGAD and iLGAD.

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 3 A A: standard Fe-I4 B:25x100um2 ("25x500" 1E, with 3DGR - a la GP). C:50x50um2 with the rest connected to GND with 3DGR D:25x100um2 (2E - version 4x100+grid to GND - a la GF) E:50x50um2 with the rest connected to GND without 3DGR F:FEI3 device: x 50x50um2 with rest to GND with 3D GR G: ROC4sens 50x50um2 H: PSI46dig I FERMILAB RD ROC 30x100um2 L: Velopix 55x55um2 M: Strip 50x50um2 M Strip 25x100um2 O Strip 30x100um2f Started in December, 2014 (To be finish in end of 2015) 8um holes, 200um thick wafers. Aspect ratio 25:1. Radiation hardness of strips with different geometries. 4 sides slim edges, 100um and 200um. Status= 90% of the fabrication process done. Temporal metal deposited and wafers are being tested at CNM. 5 wafers. BC C D E F F G G G G GG H LL L M M NON I I I I I I Standard double sided 3D- Joint 3D MPW pixel run (Atlas, CMS, LHCb) RD50 collaboration project

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 4 A A: standard Fe-I4 B:25x100um2 ("25x500" 1E, with 3DGR - a la GP). C:50x50um2 with the rest connected to GND with 3DGR D:25x100um2 (2E - version 4x100+grid to GND - a la GF) E:50x50um2 with the rest connected to GND without 3DGR F:FEI3 device: x 50x50um2 with rest to GND with 3D GR G: ROC4sens 50x50um2 H: PSI46dig I FERMILAB RD ROC 30x100um2 L: Velopix 55x55um2 M: Strip 50x50um2 M Strip 25x100um2 O Strip 30x100um2f Started in December, 2014 (To be finish in end of 2015) 8um holes, 200um thick wafers. Aspect ratio 25:1. Radiation hardness of strips with different geometries. 4 sides slim edges, 100um and 200um. Status= 90% of the fabrication process done. Temporal metal deposited and wafers being tested at CNM. 5 wafers. BC C D E F F G G G G GG H LL L M M NON I I I I I I Standard double sided 3D- Joint 3D MPW pixel run (Atlas, CMS, LHCb) RD50 collaboration project

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 5 Sensor Layouts- Atlas Standard Fe-I4 w/3DGR 50x125um 2 50x50um 2 with the rest connected to GND with 3DGR 25x100um 2 ("25x500" 1E, with 3DGR)

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 6 Sensor Layouts- CMS Underlying motivation: small size pixel sensors bonded with ROCs expected to be available in 2016 (signal routing lines where needed). Design criteria (educated guess for 2E16neq/cm 2 ) : –50x50 um 2  1E layout (à la ROC4Sens). –25x 100 um 2  2E layout (à la FCP130).

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 7 Technology tests Increase aspect ratio, 25:1 Reducing sidewall damage in deep holes. Reducing wafer breaking during process. New fabrications. 50x50um 2 with the rest connected to GND. Strips geometries 50x125um 2

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 8 Diodes and strips Pad geometries: 25x25, 25x50, 30x30, 30x50, 50x50um 2 Strips geometries: 50x50, 25x100, 30x120um 2 No guard ring. Useful to study radiation hardness. Test current density vs holes density Metal routing to fit 80um pitch electronics (Alibava Systems). May be connected trough our AC fan ins.

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 9 Simulations 50x50x200um 3 The integrated charge is normalized to the maximum charge of a non irradiated device, and the maximum collected charge is up to 50% when the detector is irradiated at 2x10 16 n/cm 2 and biased at 200V bias voltage. M. Baselga

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 10 Technology p-holes= 8um n-holes= 8um Depth of the holes:210um FZ wafers, 230um thick, p-type Rho >5Kohm Metal2 for IV testing. Bumps for UBM growth at CNM (for testing). Temporary metal for IV tests. Temporary metal deposited on the passivation layer and then removed after testing. The test can be done only on the wafer, before dicing.

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 11 Mask set (single side, thin 3D). Joint 3D MPW pixel run (Atlas, CMS) 3 FE-I4 standard (50x125um 2 ) 2 FE-I4 50x50um 2 2 FE-I4 50x50um 2 part of the pixel shorted. 2 FE-I4 25x50um 2 part of the pixel shorted 7 CMS PSI 50x50um 2 4 Fermilab chip 30x50um 2 14 RD53 chip 50x50um 2, 1E (64x64) 13 RD53 chip 50x50um 2, 2E (64x64) Diodes 50x50, 25x50, 50x125um 2 3 strips 50x50, 25x50, 50x125um 2 Objective: fabricate thin 3D detectors using single side process (very well established at CNM since many years) but with biasing on the back surface.

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 12

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 13 Technology (single side 3D) p-holes= 8um n-holes= 5um SOI wafers implanted = um, um. SOI wafers no implanted= um. Rho >1Kohm Metal2 for IV testing. Bumps for UBM growth. 50  m 35  m

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 14 Fabrication of new 3D p-type pixel detectors with enhanced multiplication using SOI wafers (RD50 funded project). Single side technology, IBL mask. 50um thick detectors with support wafer (350um), SOI. Possible to thin down the detectors. 5um holes diameter. Detector tested, good IV. Fe-I4 PSI46 M. Baselga

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 15 Measurements before irradiation TCT Measurements taken at CERN by Christian Gallrapp by IR laser setup at 70V 36m+-3m Resistivity of 150cm -> The detectors are not fully depleted before breakdown Measurements done at Ljubljana by G. Kramberger with Sr90 IV diodes CV diodes

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 16 Irradiated sensors with neutrons (Ljubljana) -Fluence n eq /cm 2 -Fluence 5·10 15 n eq /cm 2 Collected charge between two columns (TCT Measurements at CERN with IR laser) C. Gallrapp TCT measurement with IR at 90V Fluence n eq /cm 2 TCT measurement with IR at 150V Fluence 5·10 15 n eq /cm 2 Measurements by C. Gallrapp at CERN

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 17 Conclusions on 3d Single side technology CNM developed this technology in 2008*. We used it to fabricate different detectors for various applications and geometries. Our experience is that single side 3D detectors are more complicate to be fabricated and the technology is more difficult to be tuned. Anyway, the yield is higher and the breaking of the wafer is negligible. * As proposed by C. Kenney and S. Parker

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 18 Conclusions We are working to adapt the double side 3D technology to the new pixel geometry foreseen for the upgrade of the LHC experiments. A common effort in the framework of RD50 collaboration is being carried on. There is still place to push the limits of the 3D detector technology up to fluences of 2x10 16 n/cm 2. At least simulation shows that the detectors can collect more than 50% of the charge at 200V. 3D detectors with 50x50um 2 geometry are a reliable option for the upgrade. The technology is ready and the thickness of the substrate can be adapted to the requirements of the experiments.

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 19 Thank you for your attention !!!!

Giulio Pellegrini 27th RD50 Workshop (CERN) 2-4 December 2015 Centro Nacional de MicroelectrónicaInstituto de Microelectrónica de Barcelona 20 Simulations 100umx25umx200um