© BYU 09 MUX Page 1 ECEn 224 Multiplexers Decoders ROMs (LUTs)

© BYU 09 MUX Page 2 ECEn 224 A Problem Statement Design a circuit which will select between two inputs (A and B) and pass the selected one to the output (Q). The desired circuit is called a multiplexer or MUX for short

© BYU 09 MUX Page 3 ECEn A B S Q A B S Q Preferred symbol Multiplexer Symbols “Select” input

© BYU 09 MUX Page 4 ECEn A B 1 Q 0 1 A B 0 Q Data Steering 0 1 A B S Q Key idea: The select input wire selects one of the inputs and passes it out to the output. This is called a 2:1 MUX (pronounced “two-to-one”)

© BYU 09 MUX Page 5 ECEn 224 Multiplexers

© BYU 09 MUX Page 6 ECEn 224 Multiplexers AB S

© BYU 09 MUX Page 7 ECEn 224 Multiplexers Q = S’A + SB AB S A B S Q

© BYU 09 MUX Page 8 ECEn 224 Multiplexers Z = A’B’I 0 + A’BI 1 + AB’I 2 + ABI 3 4:1 MUX I0I1I2I3I0I1I2I3 Z  A B Data Inputs Control Inputs 

© BYU 09 MUX Page 9 ECEn to 1 Multiplexer 8:1 MUX I0I1I2I3I0I1I2I3 Z A B CA B C Data Inputs Control Inputs I4I5I6I7I4I5I6I7 Z = A’B’C’I 0 + A’B’CI 1 + A’BC’I 2 + …

© BYU 09 MUX Page 10 ECEn 224 A General MUX I 0 I 1 … I N-1 Z s k-1 …..s 0 N Data Inputs log 2 (N) Control Inputs Output N:1 MUX …

© BYU 09 MUX Page 11 ECEn 224 A 3:1 MUX? Q = A’B’I 0 + A’BI 1 + AB’I 2 3:1 MUX I0I1I2I0I1I2 Q A B What happens when AB = 11? Often we just use a 4:1 MUX and leave I 3 unconnected.

© BYU 09 MUX Page 12 ECEn 224 Multiplexers In A Microprocessor Each signal here is a 16-bit wide bus –A 16-bit wide MUX is simply 16 1-bit wide MUXes all with common select inputs

© BYU 09 MUX Page 13 ECEn 224 Select control lines bit 0 16-bit 3:1 MUX Example bit 0 BusA BusB BusC

© BYU 09 MUX Page 14 ECEn 224 Select control lines bit 1 16-bit 3:1 MUX Example bit 1 BusA BusB BusC

© BYU 09 MUX Page 15 ECEn 224 BusC BusB They all use the same select control lines… One bit from each bus goes to each MUX The result is a 16-bit bus s1s1 s0s bit bit 1bit 15 … BusA 16-bit 3:1 MUX Example Output bit 2

© BYU 09 MUX Page 16 ECEn 224 Implementing Logic with MUX Blocks

© BYU 09 MUX Page 17 ECEn 224 Example 1 A=0 part of the truth table … when A=0, F=0 A=1 part of the truth table … when A=1, F=B+C B+C A F Using A as the select input …

© BYU 09 MUX Page 18 ECEn 224 Example 2 B=0 part of the truth table … when B=0, F=AC B=1 part of the truth table … when B=1, F=A 0101 AC A B F Using B as the select input …

© BYU 09 MUX Page 19 ECEn 224 Example 3 C=0 part of the truth table … when C=0, F=AB C=1 part of the truth table … when C=1, F=A 0101 AB A C F All 3 of these examples are the same truth table… Using C as the select input …

© BYU 09 MUX Page 20 ECEn 224 Using a Bigger MUX AB=00 part of the truth table … when AB=00, F=0 AB F AB=01 part of the truth table … when AB=01, F=C’ AB=10 part of the truth table … when AB=10, F=1 AB=11 part of the truth table … when AB=11, F=C C’ 1 C Can easily re-order truth table to use different MUX control inputs Using AB as the select input …

© BYU 09 MUX Page 21 ECEn 224 Another 4:1 MUX Example AB F This shows that a large enough MUX can directly implement a truth table…

© BYU 09 MUX Page 22 ECEn 224 Implementing Logic Functions With Muxes Implement: Z = A ’ B + BC ’ 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3

© BYU 09 MUX Page 23 ECEn 224 Implementing Logic Functions With Muxes Implement: Z = A ’ B + BC ’ 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 for AB=00, Z=0 0

© BYU 09 MUX Page 24 ECEn 224 Implementing Logic Functions With Muxes 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 for AB=01, Z=1 1 Implement: Z = A ’ B + BC ’

© BYU 09 MUX Page 25 ECEn 224 Implementing Logic Functions With Muxes 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 1 for AB=10, Z=0 Implement: Z = A ’ B + BC ’ 0

© BYU 09 MUX Page 26 ECEn 224 Implementing Logic Functions With Muxes 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 1 for AB=11, Z=C’ C’ Implement: Z = A ’ B + BC ’ 0

© BYU 09 MUX Page 27 ECEn 224 Implementing Logic Functions With Muxes An alternate method 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 1 C’ 0 Z = A’B + BC’ A=0 B=0 A=0 B=1 A=1 B=0 A=1 B=1 Z = C’ = 0 Z = C’ = 1 Z = C’ = 0 Z = C’ = C’

© BYU 09 MUX Page 28 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14)

© BYU 09 MUX Page 29 ECEn 224 Implementing Logic Functions With Muxes X X X Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14)

© BYU 09 MUX Page 30 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7

© BYU 09 MUX Page 31 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0

© BYU 09 MUX Page 32 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D0D

© BYU 09 MUX Page 33 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D10D1

© BYU 09 MUX Page 34 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D100D10

© BYU 09 MUX Page 35 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D1000D100

© BYU 09 MUX Page 36 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D10010D1001

© BYU 09 MUX Page 37 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 D D’

© BYU 09 MUX Page 38 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 D D’ 1

© BYU 09 MUX Page 39 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7

© BYU 09 MUX Page 40 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0

© BYU 09 MUX Page 41 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0B0B

© BYU 09 MUX Page 42 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0B00B0

© BYU 09 MUX Page 43 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’

© BYU 09 MUX Page 44 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1

© BYU 09 MUX Page 45 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1 0

© BYU 09 MUX Page 46 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1 0 1

© BYU 09 MUX Page 47 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1 0 1

© BYU 09 MUX Page 48 ECEn 224 Implementing Logic Functions With Muxes An alternate method 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 Z = AC + AD’ + A’BC’ + B’CD

© BYU 09 MUX Page 49 ECEn 224 Implementing Logic Functions With Muxes An alternate method A C D Z = AC + AD’ + A’BC’ + B’CD Z = (0)(0) + (0)(1) + (1)B(1) + B’(0)(0) = B Z = (0)(0) + (0)(0) + (1)B(1) + B’(0)(1) = B Z = (0)(1) + (0)(1) + (1)B(0) + B’(1)(0) = Z = (0)(1) + (0)(0) + (1)B(0) + B’(1)(1) = B’ Z = (1)(0) + (1)(1) + (0)B(1) + B’(0)(0) = Z = (1)(0) + (1)(0) + (0)B(1) + B’(0)(1) = Z = (1)(1) + (1)(1) + (0)B(0) + B’(1)(0) = Z = (1)(1) + (1)(0) + (0)B(1) + B’(1)(1) = 1

© BYU 09 MUX Page 50 ECEn 224 Implementing Logic Functions With Muxes An alternate method 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 B 0 B’ Z = AC + AD’ + A’BC’ + B’CD

© BYU 09 MUX Page 51 ECEn 224 A C D Alternate Method Original Method Z = BZ = Z = BZ = B Z = 0Z = Z = B’Z = B’ Z = 1Z = Z = 0Z = Z = 1Z = Z = 1Z = 1 Implementing Logic Functions With Muxes An alternate method Why are they different?

© BYU 09 MUX Page 52 ECEn 224 Implementing Logic Functions With Muxes Z = AC + AD’ + A’BC’ + B’CD The original method used this grouping. X was determined to be “0”.

© BYU 09 MUX Page 53 ECEn 224 Implementing Logic Functions With Muxes Z = AC + AD’ + A’BC’ + B’CD The alternate method used this grouping. X was determined to be “1”.

© BYU 09 MUX Page 54 ECEn 224 Implementing Logic Functions With Muxes An alternate method Z = AC + AD’ + A’BC’ + B’CD The new method used this grouping. X was determined to be “1”. Which is right?? They both are!!!!

© BYU 09 MUX Page 55 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 4-to-1 MUX Z A C I0I1I2I3I0I1I2I3 B D’ 1 F = A’B’CD = (0)’B’(1)D = B’D

© BYU 09 MUX Page 56 ECEn 224 Implementing Logic Functions With Muxes An alternate method A C Z = AC + AD’ + A’BC’ + B’CD 0 0 Z = (0)(0) + (0)D’ + (1)B(1) + B’(0)D = B 0 1 Z = (0)(1) + (0)D’ + (1)B(0) + B’(1)D = B’D 1 0 Z = (1)(0) + (1)D’ + (0)B(1) + B’(0)D = D’ 1 1 Z = (1)(1) + (1)D’ + (0)B(0) + B’(1)D = 1 Same as before!

© BYU 09 MUX Page 57 ECEn 224 Decoders

© BYU Decoder Symbol F0 F1 F2 F3 I1 I0

© BYU Decoder Behavior 0 0 F0 F1 F2 F3 I1 I F0 F1 F2 F3 I1 I F0 F1 F2 F3 I1 I F0 F1 F2 F3 I1 I Key idea:The device decodes an input bus by asserting the appropriate output. This is called a 2:4 decoder (pronounced “two-to-four”)

© BYU 09 MUX Page 60 ECEn 224 2:4 Decoder A B Q0 Q1 Q2 Q3 2:4 Decoder

© BYU 09 MUX Page 61 ECEn 224 2:4 Decoder Q0 = A’B’= m0 Q1 = A’B= m1 Q2 = AB’= m2 Q3 = AB = m3 A decoder is a minterm generator… A B Q0 Q1 Q2 Q3 2:4 Decoder

© BYU 09 MUX Page 62 ECEn 224 3:8 Decoder Q0 = A’B’C’= m0 Q1 = A’B’C= m1 Q2 = A’BC’= m2… Q7 = ABC = m7 3:8 Decoder

© BYU 09 MUX Page 63 ECEn 224 Implementing Logic With Decoders 2:4 Decode F =  m(0, 2) F =  m(0, 3) 2:4 Decode F =  M(1, 2) Historically, some decoders have come with inverted outputs… 2:4 Decode m0 m2 m1 m2 M0 M3

© BYU 09 MUX Page 64 ECEn 224 Uses of Decoders Decode 3-bit op-code into a set of 8 signals op2 op1 op0 ADD SUB AND XOR NOT LOAD STORE JUMP 3:8 Decoder

© BYU 09 MUX Page 65 ECEn 224 ROM: Read Only Memory

© BYU 09 MUX Page 66 ECEn 224 ROM: Read-Only Memory Can read values from it Cannot write to it Often used as lookup tables and called LUTs

© BYU 09 MUX Page 67 ECEn 224 ROM: Read-Only Memory Example: 8-entry ROM with 1-bit output  8x1 Each entry is 1 bit 8 x 1 ROM Addr In Data Out

© BYU 09 MUX Page 68 ECEn 224 ROM: Read-Only Memory Example: 8-entry ROM with 5-bit output  8x5 Each entry is a 5-bit word 8 x 5 ROM Addr In Data Out

© BYU 09 MUX Page 69 ECEn 224 Each minterm of each function can be specified Read Only Memory (ROM) 3 Inputs Lines ABCABC F 4 F 3 F 2 F 1 F 0 5 Outputs Lines ROM 8 words x 5 bits When you program a ROM, you are specifying this

© BYU 09 MUX Page 70 ECEn 224 ROM – View #1 An addressable memory –Send in address ( addr ) –Receive data ( d ) stored at that location –Can have multi-bit data addr0 addr1 addr2 8 x 5 ROM d4 d3 d2 d1 d0

© BYU 09 MUX Page 71 ECEn 224 A hardware implementation of a truth table ROM – View #2 8 x 1 ROM C B B A F A B C F

© BYU 09 MUX Page 72 ECEn 224 ROM – Two Different Views Both views are accurate

© BYU 09 MUX Page 73 ECEn 224 ROM Internal Structure n Input Lines n:2 n decoder... m Output Lines Memory Array 2 n words x m bits

© BYU 09 MUX Page 74 ECEn 224 ROM Memory Array ABCABC m 0 =A’B’C’ m 1 =A’B’C m 2 =A’BC’ m 3 =A’BC m 4 =AB’C’ m 5 =AB’C m 6 =ABC’ m 7 =ABC F 4 F 3 F 2 F 1 F 0 F 0 = m0 + m3 F 1 = m2 + m7 F 2 = m4 + m6 F 3 = m0 + m1 + m2 + m5 F 4 = m1 + m4 + m7 3:8 Decoder  Diode - acts like a one-way conduit. Its presence causes the column to become ‘1’ when the row is decoded. Resistor – pulls column down to ‘0’ if no row wire drives it high. 0V

© BYU 09 MUX Page 75 ECEn 224 ROM Memory Array ABCABC m 0 =A’B’C’ m 1 =A’B’C m 2 =A’BC’ m 3 =A’BC m 4 =AB’C’ m 5 =AB’C m 6 =ABC’ m 7 =ABC F 4 F 3 F 2 F 1 F 0 3:8 Decoder 0V ABCF4F4 F3F3 F2F2 F1F1 F0F

© BYU 09 MUX Page 76 ECEn 224 ROM Technologies: Not Always Diode-Based PROM (Programmable Read Only Memory) –Mask programmable –Fusible Link EPROM (Erasable PROM) –Can be erased with ultraviolet light EEPROM (Electronically Erasable PROM) –Can be electrically erased Flash –Can also be electronically erased –Available in very high densities –Used in cell phones, MP3 players, cameras, and more! The details of these technologies are beyond the scope of this class.

© BYU 09 MUX Page 77 ECEn 224 Using a ROM For Logic F = AB + A’BC’ G = A’B’C + C’ H = AB’C’ + ABC’ + A’B’C

© BYU 09 MUX Page 78 ECEn 224 F = AB + A’BC’ G = A’B’C + C’ H = AB’C’ + ABC’ + A’B’C Using a ROM For Logic

© BYU 09 MUX Page 79 ECEn 224 F = AB + A’BC’ G = A’B’C + C’ H = AB’C’ + ABC’ + A’B’C Using a ROM For Logic Just fill out the truth table CAD tools usually do the rest… What size ROM is this?

© BYU 09 MUX Page 80 ECEn 224 Using ROM for Combinational Logic ROM16X1 INIT=???? a3 a2 a1 a0 ROM16X1 is a Xilinx cell Insert it into schematics like any other primitive Set its contents by double-clicking on inserted cell in schematic. A B C D

© BYU 09 MUX Page 81 ECEn 224 Using ROM for Combinational Logic ROM16X1 INIT=840D a3 a2 a1 a D A B C D Note that ABCD = 0000 is the least significant bit

© BYU 09 MUX Page 82 ECEn 224 ROM Types in Xilinx FPGAs ROM16X1 = 4-input LUT –Specify INIT contents with 4-digit HEX value ROM32X1 = 5-input LUT –Specify INIT contents with 8-digit HEX value