Preparation for TS3 Mariana Rihl

Known issues Implications on light leaks on all modules – Visible on current feedback of bias – Confirmed by study performed by Olivier with light leaks on spare modules Implication on wrong voltage feedback on bias – SiPMs biased with a voltage that should not give signal/very bad signal to noise ratio Tell1 cable on bgvtell06 gives low signal for 1 link- > got spare 7m cable from Lausanne but likely the 60m cable is the issue

HV Bias dry air exit closed to lightdry air exit open with a 30cm black tubedry air exit completely open VI0I1I2I3I0I1I2I3I0I1I2I3 [V] [uA] Data provided by Olivier Girard, taken with module 06-4L

HV Bias

LV/Bias checks Need to check the bias voltage on connectors – Check channel 24, have 5uA current when channel is off?! Check LV on RPT board (issue with voltage drop) Check LV cables in general, had to use spare Would be good to have an expert look at it as well (Guido?)

Materials needed Black insulation tape Markers Labelling machine (Bernd?) Multimeter (Mariana) Boards, cables (Mariana) Toolbox -> screwdrivers! Etc.?

Timing for Cabling When will modules get installed? How long does cooling take? Best time to do cabling would be Wednesday morning to debug the rest of the time Helping hands needed – During TS2 had 2 people who helped (thanks Bernd and Stefan). – Need at least one person to help again