Distortion of the CV characteristics by a high current A.Chilingarov, Lancaster University, UK Vidyo meeting 17.3.2014.

Slides:



Advertisements
Similar presentations
Viscosity of Dilute Polymer Solutions
Advertisements

Introductory Circuit Analysis Robert L. Boylestad
Differential Amplifiers and Integrated Circuit (IC) Amplifiers
Unijunction Transistor
Probability Distributions CSLU 2850.Lo1 Spring 2008 Cameron McInally Fordham University May contain work from the Creative Commons.
Electronic Devices Ninth Edition Floyd Chapter 10.
Measurement of Voltages and Currents
Frequency response I As the frequency of the processed signals increases, the effects of parasitic capacitance in (BJT/MOS) transistors start to manifest.
SMALL SIGNAL BJT AMPLIFIER
A. Chilingarov, A. Weidberg, Bart Hommels PTP location studies – AUW 20/04/2010, DESY Punch-through location in ATLAS SCT sensors A.Chilingarov, Lancaster.
SYNCHRONOUS MACHINES SUBMITTED BY: Ms. APOORVA KANTHWAL
True or False? The electrons in a circuit move in the same direction as the current. The current through a component is directly proportional to the voltage.
1 Chapter 5 Sensors and Detectors A detector is typically the first stage of a communication system. Noise in this stage may have significant effects on.
Excellence Justify the choice of your model by commenting on at least 3 points. Your comments could include the following: a)Relate the solution to the.
Chapter 2 Small-Signal Amplifiers
Lecture No. 11 By. Sajid Hussain Qazi
Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 13.1 Capacitance and Electric Fields  Introduction  Capacitors and Capacitance.
1 A MONTE CARLO EXPERIMENT In the previous slideshow, we saw that the error term is responsible for the variations of b 2 around its fixed component 
ECE 2300 Circuit Analysis Dr. Dave Shattuck Associate Professor, ECE Dept. Lecture Set #24 Real and Reactive Power W326-D3.
1 10. Joint Moments and Joint Characteristic Functions Following section 6, in this section we shall introduce various parameters to compactly represent.
ECE 3355 Electronics Lecture Notes Set 4 -- Version 21
Introduction to Frequency Selective Circuits
Electronics 1 Lecture 7 Diode types and application
Dynamic Presentation of Key Concepts Module 2 – Part 2 Voltage Divider and Current Divider Rules Filename: DPKC_Mod02_Part02.ppt.
Microwave Amplifier Design Blog by Ben (Uram) Han and Nemuel Magno Group 14 ENEL 434 – Electronics 2 Assignment
ENE 311 Lecture 10.
Copyright ©2011 by Pearson Education, Inc. publishing as Pearson [imprint] Introductory Circuit Analysis, 12/e Boylestad Chapter 20 Resonance.
Chapter 20 Pretest Circuits. 1. If the batteries in a portable CD player provide a terminal voltage of 12 V, what is the potential difference across.
An Assignment Submitted for the fulfillment Of internal work in the subject Physics of B.Sc.I Semester Second (KINETIC THEORY, THERMODYNAMICS AND ELECTRIC.
Copyright ©2011 by Pearson Education, Inc. publishing as Pearson [imprint] Introductory Circuit Analysis, 12/e Boylestad Chapter 20 Resonance.
Microwave Amplifier Design Blog by Ben (Uram) Han and Nemuel Magno Group 14 ENEL 434 – Electronics 2 Assignment
5: Electric Current 5.2 Electric Circuits.
Series Circuits Lecture No.4 Mehran U.E.T Khairpur.
1.6 Real Single-Phase Transformer.
DC−DC Buck Converter 1. DC-DC switch mode converters 2.
ECE 2300 Circuit Analysis Dr. Dave Shattuck Associate Professor, ECE Dept. Lecture Set #13 Step Response W326-D3.
June 3rd, 2009Studies of Depletion Voltage Jessica Metcalfe University of New Mexico Capacitance Measurements and Depletion Voltage for Annealed Fz and.
TELECOMMUNICATIONS Dr. Hugh Blanton ENTC 4307/ENTC 5307.
Dynamic Presentation of Key Concepts Module 5 – Part 1 Fundamentals of Operational Amplifiers Filename: DPKC_Mod05_Part01.ppt.
Sullivan – Fundamentals of Statistics – 2 nd Edition – Chapter 4 Section 2 – Slide 1 of 20 Chapter 4 Section 2 Least-Squares Regression.
RESISTANCE OF A SYSTEM OF RESISTORS Resistance can be joined to each other by two ways: Electricity Combination of Resistors 1. Series combination 2. Parallel.
Electrical characteristics of un-irradiated ATLAS07 mini strip sensors A.Chilingarov, Lancaster University ATLAS Tracker Upgrade UK Workshop Coseners House,
Chapter 6. Effect of Noise on Analog Communication Systems
Chapter 25 Capacitance.
DC−DC Buck Converter.
Paul Dolejschi Progress of Interstrip Measurements on DSSDs SVD.
Punch-through protection in ATLAS SCT sensors A.Chilingarov, Lancaster University, UK Meeting on Investigations into the effect of beam splash on SCT Modules.
Series and Parallel ac Circuits.
Interstrip PT Updates John Wright. Introduction In DC PT tests it was previously assumed that PT occurred between the implant and the bias rail only,
Paul Dolejschi Characterisation of DSSD interstrip parameters BELLE II SVD-PXD Meeting.
Weds. November 30, PHYS , Dr. Andrew Brandt PHYS 1444 – Section 04 Lecture #23 Wednesday November 30, 2011 Dr. Andrew Brandt Last HW Dec.
Lecture -5 Topic :- Step Response in RL and RC Circuits Reference : Chapter 7, Electric circuits, Nilsson and Riedel, 2010, 9 th Edition, Prentice Hall.
Capacitance What do you expect to happen when you close the switch? Actually nothing doesn’t happen - as you well know, one wire “becomes positive and.
5-2-3 Analogue to Digital Converters (ADC). Analogue to Digital Conversion The process is now the opposite of that studied in Topic Now we wish.
Comparison of the AC and DC coupled pixels sensors read out with FE-I4 electronics Gianluigi Casse*, Marko Milovanovic, Paul Dervan, Ilya Tsurin 22/06/20161.
Dynamic Presentation of Key Concepts Module 6 – Part 2 Natural Response of First Order Circuits Filename: DPKC_Mod06_Part02.ppt.
Influence of humidity on the IV characteristics A.Chilingarov Lancaster University ATLAS SCT Week CERN,
A simple model for the equivalent circuit of heavily irradiated Si diodes in standard CV measurements D.Campbell, A.Chilingarov, T.Sloan Lancaster University,
DC bias circuit effects in CV measurements A.Chilingarov, D.Campbell Lancaster University, UK 9 th RD50 Workshop CERN,
Resistance & Nonlinearity of Diode
Tests of the irradiated ATLAS-12 sensors
Filename: DPKC_Mod06_Part03.ppt
BASIC ELECTRICAL ENGINEERING
Problems With Assistance Module 4 – Problem 2
Capacitor Networks.
Measurements of Inductance & Capacitance
CHAPTER 59 TRANSISTOR EQUIVALENT CIRCUITS AND MODELS
Frequency response I As the frequency of the processed signals increases, the effects of parasitic capacitance in (BJT/MOS) transistors start to manifest.
Presentation transcript:

Distortion of the CV characteristics by a high current A.Chilingarov, Lancaster University, UK Vidyo meeting

A.Chilingarov, CV distortion, Contents 1.Introduction 2.Two models 3.Example with un-irradiated sensor 4.Discussion 5.Conclusions

A.Chilingarov, CV distortion, The CV measurements with the strip detectors are normally performed between the backside and the bias rail in C s -R s mode. C s represents the capacitance in the depleted volume and R s all bias resistors, R bias, connected in parallel plus the resistance of the un-depleted bulk. It was observed experimentally that the results may be distorted by a high sensor current. The aim of this talk is to investigate possible reasons for this distortion. The talk is based on a Technical Note: A.Chilingarov, “Distortion of the CV characteristics by a high current”, which can be found at the RD50 website: Please refer to it for the details. 1. Introduction.

A.Chilingarov, CV distortion, Two models High current may be interpreted as the presence in the equivalent circuit diagram of an additional resistance with a relatively low value. If the current is mostly generated inside the depleted volume the modified diagram looks like follows. Here C and R b represent the actual capacitance and resistance while R g reflects the effective conductivity due to the current generated in the depleted bulk. The C s and R s measured with this circuit at frequency f can be expressed by the following equations, where Q p =  CR g,  =2  f. Obviously C s > C and R s > R b. When R g → ∞, then C s → C and R s → R b. When R g → 0, C s → ∞.

A.Chilingarov, CV distortion, If the current is mostly due to leakage over the sensor edge the additional resistor, R l, appears in parallel to the C and R b chain as shown in the diagram. The C s and R s measured with this circuit at frequency f can be expressed by the following equations, where D s =  C(R l + R b ) and  = R l /(R l + R b ). Obviously  C. When R l → ∞, then  → 1, C s → C and R s → R b. When R l → 0, then  → 0 and C s → ∞. Note that in both models an additional resistor makes C s larger than the actual capacitance C.

A.Chilingarov, CV distortion, Above 200V the sensor is fully depleted with C s and R s reaching a plateau. Above 500V the current grows steeply and both C s and R s increase with bias. 3. An example. Un-irradiated sensor w01-bz4-p4 The plot shows the C s in pF, R s in k  and the current in  A. The bias resistor, R bias, is ~2 M  and 100 of them in parallel give R s of ~ 20 k .

A.Chilingarov, CV distortion, It was assumed that for any model an additional resistance can be estimated as the dynamic resistance following from the IV curve: R dyn = dU/dI. It is presented in the above plot in M . Note that even at its lowest level R dyn >> R s at the plateau.

A.Chilingarov, CV distortion, The average C s and R s values between 200 and 260 V were used as C and R b. Then C s and R s were calculated for both models using R dyn as R g or R l respectively. The plot shows the experimental C s values and those calculated from the two models. Both models agree well with the data.

A.Chilingarov, CV distortion, Similar plot for the R s values. Again both models agree well with the experimental data.

A.Chilingarov, CV distortion, Discussion It is not surprising that both models give very similar results. R dyn is always more than 1 M  while R b is ~ 20 k . Therefore the parameter  = R l /(R l +R b ) with R l = R dyn is very close to 1. In this situation the equations for the leakage current model (slide 5) revert to the equations for the generation current model (slide 4) with R l in place of R g. In the above example the additional resistor value set to dU/dI explains the experimental data quite well. However this is not always the case. Moreover the high current may have both generation and leakage components and the equivalent circuit diagram should include both R g and R l. The C s and R s can in this case be calculated combining the equations on slides 4 and 5. For both models C s > C. It is easy to show that the same is true when both R g and R l resistors are present.

A.Chilingarov, CV distortion, Conclusions 1.The distortion of the experimentally measured parameters C s and R s can be explained by an additional resistance with a relatively low value, which appears because of a high current. 2.In the example given in this talk the assumption of the additional resistor to be equal to dU/dI explains the data quite well by both models. 3.In the general case both R g and R l resistors may be required to be included in the equivalent circuit diagram. However in all cases C s > C i.e. a high leakage current should always lead to an increase in the measured capacitance.

A.Chilingarov, CV distortion, Backup slides

A.Chilingarov, CV distortion, Use equation on the slide 4; C sg > C C s calculation in the case when both R g and R l are present Use equation on the slide 5; C s > C sg > C