Penn ESE535 Spring 2013 -- DeHon 1 ESE535: Electronic Design Automation Day 15: March 13, 2013 High Level Synthesis II Dataflow Graph Sharing.

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Presentation transcript:

Penn ESE535 Spring DeHon 1 ESE535: Electronic Design Automation Day 15: March 13, 2013 High Level Synthesis II Dataflow Graph Sharing

Penn ESE535 Spring DeHon 2 Today Sharing Dataflow subgraph –Pattern identification –Pattern selection Behavioral (C, MATLAB, …) RTL Gate Netlist Layout Masks Arch. Select Schedule FSM assign Two-level, Multilevel opt. Covering Retiming Placement Routing

Penn ESE535 Spring DeHon 3 Flow Review

Penn ESE535 Spring DeHon 4 Additional Concerns? What are we still not satisfied with? Parallelism in hyperblock –Especially if memory sequentialized Disambiguate memories? Allow multiple memory banks? Only one hyperblock active at a time –Share hardware between blocks? Data only used from one side of mux –Share hardware between sides? Most logic in hyperblock idle? –Couldn’t we pipeline execution?

Preclass Common subgraphs? How would we like to share? –If trying to avoid slowdown –If willing to make area-time tradeoffs? Penn ESE535 Spring DeHon 5

Subgraph Sharing Can potentially share identical subgraphs Can share similar subgraphs Penn ESE535 Spring DeHon 6

Evaluating Subgraph Sharing What do we have to do to share subgraphs? When is it worthwhile? –How big does graph need to be? –How much overhead to share? Penn ESE535 Spring DeHon 7

Example Muxes on inputs to an adder –Probably bigger than just having two adders –2(Amux) + Aadd > 2(Aadd) Muxes on input to mulitipler –Probably smaller than two multipliers –2(Amux+Ampy) < 2(Ampy) Penn ESE535 Spring DeHon 8

Extreme Case If ignored multiplexing overhead, what would we get? Penn ESE535 Spring DeHon 9

VLIW Extreme Sketch –Each basic block requires a set of operators to achieve minimum path length –Union sets over all basic blocks –Build VLIW with that operator set Why unsatisfying? Penn ESE535 Spring DeHon 10 + XX

Favorable Subgraphs Particularly beneficial when I/O into subgraph small –Overhead for muxing proportional to inputs Penn ESE535 Spring DeHon 11

Approach Find candidate, reusable subgraphs Select a cover set of subgraphs Assign original graph to subgraphs –Assess benefits of sharing Patch together subgraphs with control and multiplexing Penn ESE535 Spring DeHon 12

Find Subgraphs How might we find the set of candidate subgraphs? Penn ESE535 Spring DeHon 13

Finding Subgraphs Keep set of subgraphs of size k Create subgraphs of size k+1 from subgraphs of size k –By adding a neighboring node Maybe several such expansions for each k- subgraph Careful: can end up with exponential subgraphs Penn ESE535 Spring DeHon 14

Optimization Canonicalize subgraphs so recognize when encounter same subgraph again –Keep set of subgraphs small Penn ESE535 Spring DeHon 15

Optimization Compute candidate graph patterns during subgraph generation –Each subgraph may become a candidate –Keep track of subgraphs that might match with candidate subgraphs –As add subgraph, compare it with candidate patterns and add to list if “close” enough –At end of a given graph size, prune out patterns with too few potential matches Penn ESE535 Spring DeHon 16

Close enough? Conceptually: not too expensive to use the candidate pattern Concretely: compute a distance metric between graph and pattern –Minimum cost of edits to morph one graph into another E.g. relabel nodes, remove nodes –Want to capture potential cost of adding muxes and control Penn ESE535 Spring DeHon 17

Penn ESE535 Spring DeHon 18 [Cong & Jiang / FPGA 2008]

Cover Subgraphs What’s our goal? Penn ESE535 Spring DeHon 19

Cover Goal Minimize area Minimum added latency –Delay of BB covered by p in P Penn ESE535 Spring DeHon 20

Cover Subgraph Given a proposed set of pattern graphs, how can we cover? Penn ESE535 Spring DeHon 21

Cover Subgraph How many sets if we explored them all? Penn ESE535 Spring DeHon 22

Greedy Cover Subgraph How might we cover greedily? Penn ESE535 Spring DeHon 23

Greedy Cover Subgraph Select most beneficial pattern Assign it to the stuff it covers –Add logic to share accommodate –Remove those as things that need to be covered Repeat until all covered or no benefit Penn ESE535 Spring DeHon 24

Most Beneficial Pattern How would we define pattern benefit? Penn ESE535 Spring DeHon 25

Beneficial Pattern Area Latency Penn ESE535 Spring DeHon 26 [Cong & Jiang / FPGA 2008]

Pattern and Graph Statistics Penn ESE535 Spring DeHon 27 [Cong & Jiang / FPGA 2008]

Penn ESE535 Spring DeHon 28 Big Ideas: Sharing Estimation Techniques –Graph Matching –Covering –Greedy

Penn ESE535 Spring DeHon 29 Admin Assignment 5a due Monday Reading for Monday online