INSTRUCTION SET PRINCIPLES

Computer Architecture’s Changing Definition  1950s to 1960s: Computer Architecture Course = Computer Arithmetic  1970s to mid 1980s: Computer Architecture Course = Instruction Set Design, especially ISA appropriate for compilers  1990s: Computer Architecture Course = Design of CPU, memory system, I/O system, Multiprocessors

Instruction Set Architecture (ISA) instruction set software hardware

Instruction Set Architecture  Instruction set architecture is the structure of a computer that a machine language programmer must understand to write a correct (timing independent) program for that machine.  The instruction set architecture is also the machine description that a hardware designer must understand to design a correct implementation of the computer.

Interface Design A good interface: Lasts through many implementations (portability, compatibility) Is used in many different ways (generality) Provides convenient functionality to higher levels Permits an efficient implementation at lower levels Interface imp 1 imp 2 imp 3 use time

Evolution of Instruction Sets Single Accumulator (EDSAC 1950) Accumulator + Index Registers (Manchester Mark I, IBM 700 series 1953) Separation of Programming Model from Implementation High-level Language BasedConcept of a Family (B )(IBM ) General Purpose Register Machines Complex Instruction SetsLoad/Store Architecture RISC (Vax, Intel ) (CDC 6600, Cray ) (Mips,Sparc,HP-PA,IBM RS6000,PowerPC ) LIW/”EPIC”?(IA )

Evolution of Instruction Sets  Major advances in computer architecture are typically associated with landmark instruction set designs  Ex: Stack vs GPR (System 360)  Design decisions must take into account:  technology  machine organization  programming languages  compiler technology  operating systems  And they in turn influence these

What Are the Components of an ISA?  Sometimes known as The Programmer’s Model of the machine  Storage cells  General and special purpose registers in the CPU  Many general purpose cells of same size in memory  Storage associated with I/O devices  The machine instruction set  The instruction set is the entire repertoire of machine operations  Makes use of storage cells, formats, and results of the fetch/execute cycle  i.e., register transfers

 The instruction format  Size and meaning of fields within the instruction  The nature of the fetch-execute cycle  Things that are done before the operation code is known What Are the Components of an ISA?

Computer Arithmetic Taxonomy of integers

Range of sign-and-magnitude integers # of Bits # of Bits  127  0   0   ,147,483,647 Range

In sign-and-magnitude representation, the leftmost bit defines the sign of the number. If it is 0, the number is positive.If it is 1, the number is negative. Note:

Example of storing sign-and-magnitude integers in two computers Decimal Decimal ,760 8-bit allocation overflow 16-bit allocation

Example 8 Interpret in decimal if the number was stored as a sign-and-magnitude integer. Solution Ignoring the leftmost bit, the remaining bits are This number in decimal is 59. The leftmost bit is 1, so the number is –59.

There are two 0s in one’s complement representation: positive and negative. In an 8-bit allocation: +0   Note:

Range of one’s complement integers # of Bits # of Bits  127  0   0   ,147,483,647 Range

In one’s complement representation, the leftmost bit defines the sign of the number. If it is 0, the number is positive.If it is 1, the number is negative. Note:

Example of storing one’s complement integers in two different computers Decimal Decimal       8-bit allocation overflow 16-bit allocation

One’s complement means reversing all bits. If you one’s complement a positive number, you get the corresponding negative number. If you one’s complement a negative number, you get the corresponding positive number. If you one’s complement a number twice, you get the original number. Note:

Two’s complement is the most common, the most important, and the most widely used representation of integers today. Note:

Range of two’s complement integers # of Bits  128  32,768  , ,147,483,647 Range

In two’s complement representation, the leftmost bit defines the sign of the number. If it is 0, the number is positive. If it is 1, the number is negative. Note:

Example of storing two’s complement integers in two different computers Decimal Decimal       8-bit allocation overflow 16-bit allocation

Memory Addressing  How is a memory address interpreted?  Byte addressed: Provide access for bytes, half words, words, and double words (64 bits)  Conventions for ordering the bytes within a word:  Little Endian: put byte whose address xxxx00 at LSB position. Word addressData  Big Endian: Put byte whose address xxxx00 at MSB position. Word addressData

Address Alignment  Access to objects larger than a byte must be aligned.  An access to an object of size S bytes at byte address A is aligned if A mod S =0.  Fig. 2.5 aligned and misaligned access ObjectAligned atMisaligned at addressedbyte offsetsbyte offsets Byte0,1,2,3,4,5,6,7Never Half word0,2,4,61,3,5,7 Word0,41,2,3,5,6,7, Double word01,2,3,4,5,6,7  A misaligned memory access will take multiple aligned memory references

Addressing Mode  How architectures specify the address of an object they will access?  In a GPR, an addressing mode can specify  a constant,  a register,  a location in memory (used to compute effective address).  Immediate or literals are usually considered as memory addressing mode.  Addressing modes that depend on the program counter is called PC-relative addressing.  Addressing modes can significantly reduce instruction counts, but may add to the complexity of building a machine and increase the average CPI.

Karnaugh map  The Karnaugh map, also known as the K-map, is a method to simplify boolean algebra expressions..  The Karnaugh map reduces the need for extensive calculations by taking advantage of humans' pattern-recognition capability. It also permits the rapid identification and elimination of potential race conditions.

Diagram showing K-map for f(A, B, C, D).

Exercise