Lecture 3 Boolean algebra Topics Error Correcting Codes Boolean algebra Combinational circuits Algebraic analysis, Truth tables, Logic Diagrams Sums-of-Products and Products-of-Sums August 31, 2015 CSCE 211 Digital Design

– 2 – CSCE 211H Fall 2015 Overview Last Time: BCD, excess-3 Ripple carry Adder Two’s complement IEEE 754 floatsNew: Some from Lecture 02: floats again; two’s complement overflow Boolean Algebra Basic Gates: symbols and truth tables for : AND, OR, NOT, NOR, NAND, XOR, Half Adder: table and circuit Full Adder: Table and logic diagram from 2 Half-adders + ??? Gray Code, Error Correcting Codes Example Error Correcting Codes Combinational circuits Algebraic analysis, Truth tables, Logic Diagrams Sums-of-Products and Products-of-Sums

– 3 – CSCE 211H Fall 2015 PopQuiz 1.Convert to Octal 2.Octal to binary is like hex to binary except groups of 3 since 2 3 = 8 Convert to binary 1.Convert to hex 2.Give the representation of as a IEEE 754 float a. What is the sign bit? b. Write in “binary” scientific notation(normalized) c. What is the Actual Exponent? d. What is the exponent field? e. What is the fraction field?

– 4 – CSCE 211H Fall 2015 Boolean Algebra George Boole (1854) invented a two valued algebra To “give expression … to the fundamental laws of reasoning in the symbolic language of a Calculus.” 1938 Claude Shannon at Bell Labs noted that this Boolean logic could be used to describe switching circuits. (Switching Algebra) In Shannon’s view a relay has two positions open and closed representing 1 and 0. Collections of relays satisfied the properties of Boolean algebra.

– 5 – CSCE 211H Fall 2015 Basic Gates

– 6 – CSCE 211H Fall 2015 Describing Circuits: Ex. Half-adder Boolean Expression Truth Table Block diagram symbol Logic Diagram

– 7 – CSCE 211H Fall 2015 Full Adder Truth Table From last time the table for a full adder is shown at the right. In this the inputs are: X i the i th bit of one of the input numbers Y i the i th bit of the other input C i the carry into the i th stage And the outputs are: S i the sum from this stage and C i+1 the carry to the (i+1) st stage CiCiCiCi XiXiXiXi YiYiYiYi SiSiSiSi C i

– 8 – CSCE 211H Fall 2015 Full Adder From Half Adders Now one implementation of a full adder is to build one using two half-adders and an OR FA HA xixi yiyi sisi cici c i+1 xixi yiyi sisi cici

– 9 – CSCE 211H Fall 2015 Error Correcting codes Revisited For an n-bit code, consider the hypercube of dimension n Choose some subset of the nodes as code words. Suppose the distance between any two code words is at least 3. Now consider transmission errors. Then if there is an error in transmitting just one bit then the distance from the received word to one code word is one, distances to other code words are at least two. Single error correcting, double error detecting. Such codes are called Hamming codes after their inventor Richard Hamming.

– 10 – CSCE 211H Fall 2015 Boolean Algebra Axioms The axioms of a mathematical system are a minimal set of properties that are assumed to be true. Axioms of Boolean Algebra  X = 0 if X != 1 1’. X=1 if X!=0  If X = 0, then X’ = 12’. if X=1 then X’=0  0. 0 = 03’ = 1  1. 1 = 14’ = 0  0. 1 = 1. 0 = 05’ = = 1 Axioms 1-5 and 1’-5’ completely define what it means to be a Boolean algebra.

– 11 – CSCE 211H Fall 2015 Boolean Algebra Theorems We can prove a new theorem: By directly applying axioms and other already proved theorems, or By directly applying axioms and other already proved theorems, or By perfect induction, i.e. considering all possible cases By perfect induction, i.e. considering all possible cases Truth tables

– 12 – CSCE 211H Fall 2015 Consider a Proof from the axioms Prove Theorem “T5: X + X’ = 1” from the axioms Proof: First suppose that X=1. Then by Axiom 2’ (if X=1 then X’=0) we have X’=0 and thus X + X’ = and then by Axiom 5’ (1+0 = 1) and so X + X’ = 1. Now if X != 1 then by Axiom 1 (X = 0 if X != 1) and we have X = 0. Then by Axiom 2 (If X = 0, then X’ = 1) we have X’=1 and so X + X’ = and again by axiom 5’ (0 + 1 = 1) we have X + X’ = 1

– 13 – CSCE 211H Fall 2015 More Theorems N.B. T8, T10, T11

– 14 – CSCE 211H Fall 2015 Consider a Truth Table Proof Prove Theorem “T8’: (X+Y). (X+Z) = X + Y. Z” using a truth table XYZX+YX+Z (X+Y). (X+Z) X Y.ZY.ZY.ZY.Z X + Y. Z Then since the “(X+Y). (X+Z)” column and the “X + Y. Z” column are …. for all possible values of X, Y and Z this truth table proves …

– 15 – CSCE 211H Fall 2015 Consider a Truth Table Proof Prove Theorem “T8’: (X+Y). (X+Z) = X + Y. Z” using a truth table XYZX+YX+Z (X+Y). (X+Z) X Y.ZY.ZY.ZY.Z X + Y. Z Then since the “(X+Y). (X+Z)” column and the “X + Y. Z” column are identical for all possible values of X, Y and Z this truth table proves (X+Y). (X+Z) = X + Y. Z

– 16 – CSCE 211H Fall 2015 Duals Given a boolean equation then we can take its dual by Replacing each 1 with 0, replacing each 0 with a 1, replacing each ‘+’ (OR) with ‘. ’ (AND), and replacing each ‘. ’ (AND) with a ‘+’ (OR) Example: The dual of X. Y + X. Z = X. (Y+Z) is …

– 17 – CSCE 211H Fall 2015 Principle of Duality Given a boolean equation E that is a theorem if we take the dual then the resulting equation is also a theorem. Why? Each axiom (A1-A5) has a dual (A1-A5 Example: X + (Y + Z) = (X + Y) + Z (this is theorem T7) X  (Y  Z) = (X  Y)  Z (taking the dual yields T7’) X + (Y + Z) = (X + Y) + Z (this is theorem T7) X  (Y  Z) = (X  Y)  Z (taking the dual yields T7’) Example 2: X + X’ = 1(Axiom A5) X  X’ = 0(taking the dual yields Axiom A5’)

– 18 – CSCE 211H Fall 2015 Principle of Duality 2 Now consider the following argument using duals X + X  Y = X (this is theorem T9) X  X + Y = X (by taking the dual ???) X + Y = X (But then X  X = X by T3) Counterexample? This is not true! (consider X=0, Y=1) Where did we go wrong? X + (X  Y) = X (T9 fully parenthesized) X  (X + Y) = X (dual) (X  X) + (X  Y) = X (using T8 to rewrite left side) X + (X  Y) = X (the using T3)

– 19 – CSCE 211H Fall 2015 N-variable Theorems Prove using finite induction Most important: DeMorgan theorems

– 20 – CSCE 211H Fall 2015 Combinational Circuit Analysis A combinational circuit is one whose outputs are a function of its inputs and only its inputs. These circuits can be analyzed using:  Truth tables  Algebraic equations  Logic diagrams

– 21 – CSCE 211H Fall 2015 Boolean Algebra Proofs Axioms Statements (boolean equations) that are assumed to be true that form the basis of a mathematical system.Theorems Statements that can be “proved” from the axioms and earlier theorems. Lemmas, Corollaries, Postulates Proof by truth-table For a “possible theorem” with a small number of variables, we can exhaustively consider all possible cases. Algebraic Proofs Apply axioms and previously proven theorems to rewrite a “possible theorem” until it is reduced to an equation known to be true.Induction Basis case: P(1) Inductive hypothesis: Assuming P(n) show P(n+1)

– 22 – CSCE 211H Fall 2015 Proof by truth-table Prove Demorgan’s Law: (X+Y)' = X '. Y ' XY(X+Y)(X+Y)' X ' Y ' X'. Y' ' '' Note the table considers all possible cases and in each case the value in the column for (X+Y)' is equal to the value in the column for X'. Y' ''' So, (X+Y) ' = X'. Y'

– 23 – CSCE 211H Fall 2015 Algebraic Simplification Simplify F = A. B. C’. D + D. C. A + B. C. D + A’. B’. C. D

– 24 – CSCE 211H Fall 2015 Proof by Induction Thereom 13 (X 1. X 2. X 3 …. X n )’ = X 1 ’ + X 2 ’ + X 3 ’ … + X n ’ Proof: Basis Step n = 2, (X 1. X 2 )’ = X 1 ’ + X 2 ’ was proven using a truth-table. Now suppose as inductive hypothesis that (X 1. X 2. X 3 …. X n )’ = X 1 ’ + X 2 ’ + X 3 ’ … + X n ’ (X 1. X 2. X 3 …. X n )’ = X 1 ’ + X 2 ’ + X 3 ’ … + X n ’ Then consider (X 1. X 2. …. X n. X n+1 )’ = ((X 1. X 2. X 3 …. X n ). X n+1 )’by associativity = (X 1. X 2. X 3 …. X n )’ + X n+1 ’by the basis step = (X 1 ’ + X 2 ’ + X 3 ’ … + X n ’) + X n+1 ’ by the inductive hypothesis

– 25 – CSCE 211H Fall 2015 Universal Sets of Gates A set of Gates(operators), S, is universal if every boolean function can be expressed using gates only from S. Examples {AND, OR, NOT} is a universal set {AND, OR, NOT} is a universal set {NAND} is a universal set {NAND} is a universal set

– 26 – CSCE 211H Fall 2015 Universal Sets of Gates (cont.) Examples {AND, OR} is not {AND, OR} is not {NOR}? {NOR}? {XOR}? HW {XOR}? HW

– 27 – CSCE 211H Fall 2015 Combinational Circuit Analysis A combinational circuit is one whose outputs are a function of its inputs and only its inputs. These circuits can be analyzed using:  Truth tables  Algebraic equations  Logic diagrams – timing considerations; graphical

– 28 – CSCE 211H Fall 2015 Switching Algebra Terminology Literal – a variable or the complement of a variable Product term – a single literal or the AND of several literals Sum term – a single literal or the OR of several literals Sums-of-productsProduct-of-sums Normal term – a product (sum) term in which no variable appears twice Minterm – a normal product term with n literals Maxterm – a normal sum term with n literals

– 29 – CSCE 211H Fall 2015 Timing Analysis We will do some extensive timing analysis in the labs but for right now we will assume the delay for and an AND-gate and an OR-gate is “d” When we fabricate circuits there are a couple special circumstances:  Inverters (Not gates) cost nothing  Circuits are usually fabricated from “NANDs”

– 30 – CSCE 211H Fall 2015 Circuit Simplification Why would we want to simplify circuits? To minimize time delays To minimize costs To minimize area

– 31 – CSCE 211H Fall 2015 Sums-of-Products What is the delay of sums-of-products circuit?

– 32 – CSCE 211H Fall 2015 Circuit Simplification Minterms – a product term in which every variable occurs once either complemented or uncomplemented Sum of minterms form: F(X,Y) = X’. Y’ + X. Y’ + X. Y F(X,Y) = Σ (0, 2, 3) (sum of minterms m, with F(m)=1 XYFminterm 001 X’. Y’ 010 X’. Y 101 X. Y’ X. Y’ 111 X. Y

– 33 – CSCE 211H Fall 2015 Karnaugh Maps Tabular technique for simplifying circuits two variable maps three variable map two variable maps three variable map XY Z Z X Y X Y XYZ

– 34 – CSCE 211H Fall 2015 Karnaugh Map Simplification Simplify F(X,Y,Z) = Σ(0,2,6,4,7,5) Z XY Z F(X,Y,Z)= Minimize ? – here it will mean “fewer gates, fewer inputs” F(X,Y,Z)=F(X,Y,Z)=

– 35 – CSCE 211H Fall 2015 Karnaugh Map Terminology F(X,Y,Z) = Σ(1,4,5,6,7) Z XY Z Implicant set - rectangular group of size 2 i of adjacent containing ones (with wraparound adjacency) Each implicant set of size 2 i corresponds to a product term in which i variables are true and the rest false Implicant Sets:

– 36 – CSCE 211H Fall 2015 Karnaugh Map Terminology F(X,Y,Z) = Z XY Z Prime implicant – an implicant set that is as large as possible Implies – We say P implies F if everytime P(X 1, X 2, … X n ) is true then F (X 1, X 2, … X n ) is true also. If P(X 1, X 2, … X n ) is a prime implicant then P implies F

– 37 – CSCE 211H Fall 2015 Karnaugh Map Terminology F(X,Y,Z) = Z XY Z Prime implicants – If P(X 1, X 2, … X n ) is a prime implicant then P implies F and if we delete any variable from P this does not imply F.

– 38 – CSCE 211H Fall 2015 Karnaugh Map Simplification F(X,Y,Z) = Z XY Z F(X,Y,Z) =

– 39 – CSCE 211H Fall 2015 Karnaugh Map Simplification F(X,Y,Z) = Z XY Z F(X,Y,Z) =

– 40 – CSCE 211H Fall Variable Map Simplification F(W,X,Y,Z) = YZ WX Z W X Y

– 41 – CSCE 211H Fall Variable Map Simplification F(W,X,Y,Z) = YZ WX Z W X Y

– 42 – CSCE 211H Fall 2015 Products-of-Sums What is the delay of products-of-sums circuit?