1 Lecture #13 EGR 277 – Digital Logic Sequential Counters Counters are an important class of sequential circuits. Counters follow a predetermined sequence of states. A counter changes state upon application of an input pulse. The input pulse is not necessarily a periodic clock. For example, a traffic counter is “clocked” each time a car passes. Key uses of counters Count occurrences of an event Example: Traffic counter Example: Line counter on ASEE autonomous vehicle Generate timing sequences to control operations Frequency division Reading Assignment: Chapter 5 in Digital Design, 3 rd Edition by Mano

2 Lecture #13 EGR 277 – Digital Logic Example: Show that a JK flip-flop in the toggle mode acts as a modulo-2 counter or a divide-by-2 circuit.

3 Lecture #13 EGR 277 – Digital Logic Example: Show that a 3-bit counter can serve as a modulo-8 counter or a divide- by-8 circuit.

4 Lecture #13 EGR 277 – Digital Logic Example: Show how a circuit with a 1MHz master clock might use counters (as frequency dividers) to provide synchronized lower frequencies.

5 Lecture #13 EGR 277 – Digital Logic Simplified Counter Design using T flip-flops A full circuit excitation table may not be necessary in some cases with T flip-flops, especially when the states are in counting order. It is easy to see which bits need to be toggled to produce the next state. Example: Design a mod-6 counter using T flip-flops.

6 Lecture #13 EGR 277 – Digital Logic Counters with multiple counting sequences Switches can be easily used to control counting direction or counting sequences. Example: Design a mod-6 UP/DOWN counter using T flip-flops.

7 Lecture #13 EGR 277 – Digital Logic Example: Design a counter with 2 input switches, x and y, that can count in 4 possible sequences based on the switch positions. Use JK flip-flops.

8 Lecture #13 EGR 277 – Digital Logic Flip-flop Excitation Tables Q(t)Q(t+1)JKSRDT 000X0X00 011X X X0X010 Circuit Excitation Table

9 Lecture #13 EGR 277 – Digital Logic Flip-flop Input Functions and Circuit Output Functions

10 Lecture #13 EGR 277 – Digital Logic Counters with repeated counts Suppose that we wanted a counter that would count in the sequence 0, 1, 2, 6, 1, 7 and repeat. What is the next state for count 1? Is it 2 or is it 7? It can’t be both! This problem can be resolved in a couple of manners. 1)Add an extra flip-flop. Since 3 flip-flops are required to encode the highest count (7), a 4 th flip-flop could be added as the most significant bit. If the first count of 1 is encoded as 0001 and the second is encoded as 1001, then the actual count is 0, 1, 2, 6, 9, 7, but if the MSB is not used as a part of the output, then the original count if obtained. Note that the addition of two extra flip-flops would allow for each count to be repeated up to 4 times. 2)Since the original counting sequence has 6 counts, a mod-6 counter could be used followed by a code converter (as designed earlier with combinational logic circuits).

11 Lecture #13 EGR 277 – Digital Logic Example: Design a counter that will count in the sequence 0, 1, 2, 6, 1, 7 and repeat using method 1 (adding extra flip-flops).

12 Lecture #13 EGR 277 – Digital Logic Example: Design a counter that will count in the sequence 0, 1, 2, 6, 1, 7 and repeat using method 2 (using a code converter).

13 Lecture #13 EGR 277 – Digital Logic Example: Design a counter that will count in the sequence 0, 1, 2, 1, 1, 2, 2, 3, 4, 3, 6, 5, 6, 1, 7 and repeat using method 1 (using extra flip-flops).