Process Scheduling III ( 5.4, 5.7) CPE Operating Systems

Multiple-Processor Scheduling (5.4)

Asymmetric vs Symmetric Processing

Asymmetric Multiprocessing Cell Processor

The Cell Processor

Symmetric Multiprocessing (SMP)

The Xenon Processor

Broadway CPU Single Core 729 MHz

4-Way SMP

Has 750 Million Transistors How does 750 million objects look like?

Garth Brooks in Central Park New York, 1997

750,000 Viewers

Biggest Concert in History?

Rod Stewart

3,500,000 Viewers

Symmetric Multithreading (SMT) Hyperthreading

SMT Architecture Figure 5.8 Each logical CPU has: - Its own registers - Can handle interrupts Similar to Virtual Machines but done at the HW level

CPU Affinity (proc staying at one processor) CORE 1CORE 2 Cache Main Memory Soft Affinity – Process may be migrated to a different processor Hard Affinity – Process is locked to one processor

Load Balancing: Push Migration CORE 1CORE 2 Ready Queue 1Ready Queue 2 Kernel Check load Push Migration

Load Balancing: Pull Migration CORE 1CORE 2 Ready Queue 1Ready Queue 2 Kernel Notify queue empty Pull Migration

Evaluation Methods Deterministic Modeling Simulations

Deterministic Modeling

Simulations Figure 5.15