DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status Low Voltage system End-ladder ASIC High Voltage system Cooling system Schedule

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - LV system (1) System description: –6 LV crates (3 per barrel side) with 8 LV modules each each LV module has 2 identical sections to supply 2 SDD half ladder –2 LV controllers (1 per SDD barrel) LV Modules DCS features: –inputs for interlocks controlled by the firmware of the on-board controller –automatic switch-off on anomalous conditions (over-current, over-voltage, over-temperature of the module) –status register that can be inquired by the control software LV module prototypes tested in lab with 20 m long cables: OK

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - LV system (2) LV system production –LV modules finalization waits for final version of FEE expected by 4/2003 –then: final LV prototypes produced and tested in 6 months final production (6 months) completed by 4/2004 LV Control software: work in progress –communication with LV modules, based on RS-232, is ready the status registers of the 18 LV modules of half SDD barrel can be read in 1.2 s (the two LV controllers work in parallel) –communication via TPC/IP in development, prototype expected by 2/2003

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - End-ladder ASIC (1) Purpose: checks on cooling system before power-on of the FEE and of SDDs  independent power supply line Each LV end-ladder board, carrying two LV rad-hard voltage regulators (LHC4913), has one DCS-ASIC ASIC Features: –4 analog inputs to read V in and V out of the 2 regulators –3 analog inputs to read the temperature on the inlet water pipe, of the LV- and HV-board heat bridges; range o C, resolution  0.1 o C –2 digital inputs to detect the over-current conditions signaled by the LV regulators –2 digital output to enable/disable the LV regulators –7-bits digital output to control the bias current of the laser diodes of the data links, via I 2 C bus –2 general purpose analog outputs (8 bit resolution DACs) –communication with the ASIC via twisted-pair LVDS line

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - End-ladder ASIC (2) Schedule –submission of 1st prototype in the Aug.2002 MPW –design of the ASIC interface to DCS : 9/2002 it has to have data multiplexing capabilities and interface with “standard” DCS I/O boards location of the ASIC interface: to be defined (likely near the DCS crates) –ASIC interface to DCS tested : 2/2003

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - HV system (1) System description: –5 16-slot HV crates with up to 5 MV and 5 HV boards each HV board: 12 channels, floating, mA (2 slots each) MV board: 12 channels, floating, 10 mA (1 slot each) each SDD needs 1 MV and 1 HV channels –1 controller per HV crate HV Modules DCS features: –automatic switch-off on anomalous conditions (over-current, over- temperature of the module) –input for HW interlock switch-off all the channels in a crate –status registers that can be inquired by the control software –remote programming & monitoring of : voltage, current, ramp-up, ramp/down, temperature of the module

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - HV system (2) HV prototypes and production –HV module prototypes expected in INFN-Trieste by 8/2002 –tender for the production by 12/2002 –production expected to start on 5/2003 and to last about 8 months HV Control software: –OPC Server to ease integration in DCS (over TCP/IP or other CERN- approved field-buses) available from factory

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - Cooling (1) System description - internal circuit: –the 14 ladders (and the 28 end-ladders) of the layer 3 are grouped in 7 sectors of 2 ladders (4 end-ladders) –the 22 ladders and the 24 end-ladders of the of layer 4 are grouped in 6 sectors of 3 (6) or 4 (8) ladders –this results into 7+6=13 cooling circuits per barrel side; each circuits has two inlets (to feed 1 ladder pipe and 1 end-ladder pipe) and one outlet (collecting the coolant from 1 ladder pipe and 1 end-ladder pipe) –for each circuit we monitor/control: pressure at inlets and outlets : 2x13x3 = 78 analog values temperature at inlets and outlets :2x13x3 = 78 analog values mass flow at inlets :2x13x2 = 52 analog values bypass valves to fill/empty the circuit:2x13x2 = 52 digital values

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - Cooling (2) System description external circuit: –it’s being defined in collaboration with the STCV group –current working hypothesis (only 2 sectors per layer) includes: chiller heaters for fine regulation of water temperature circulation pump controls

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - Cooling (3) System description - air circulation –4 air ducts are foreseen per barrel side –detailed circuit layout still under study –preliminary list of values to be monitored per each duct mass flow humidity values related to the air conditioning system Schedule –design review for the internal circuit and air circulation:12/2002 –external cooling circuit construction (6 months)Q3/2003

DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status - Schedule Sub-systems can be tested in the ALICE DCS environment starting on: –LV 3/2003 –End-ladder ASIC 3/2003 –HV 6/2003 –Cooling system 9/2003 –SDD DCS global tests10/2003 Final SDD DCS system available 5/2004 –(start of ladder construction : 6/2004)