ISCUG Keynote May 2008 Acknowledgements to the TI-Nokia ESL forum (held Jan 2007) and to James Aldis, TI and OSCI TLM WG Chair 1 SystemC: Untapped Value and Why Nagendra G. D

ISCUG Keynote May Outline ESL Goals & Central role of SystemC Bridges to build, Barriers to break –Language completeness –Tools adoption –R&D Costs for IP, & Si vendors India SCUG opportunities

ISCUG Keynote May ESL goals Standardized interoperability of system level modeling methodologies Consistent SystemC based model library of all components for all purposes with a very limited set of modeling style options Standardized interfaces, tool independency Standards based ESL flow, master platform description that produces several possible simulation environments / SW runtimes Standard meta-data format for IP interfaces, requirements, constraints etc. Open issues –Processor and memory model standardization –Verification –Open integrated development environment Processor core model IP (proprietary) Behavior Interface (OSCI) Interconnect (OCP) Standard (SPIRIT) metadata-library Socket (OCP) IP (proprietary ) Behavior Interface (OSCI) Socket (OCP) Interface (OSCI) Socket (OCP) Memory model Interface (OSCI) Socket (OCP) Configuration, debug, tracing, etc. (OCP, OSCI, SPIRIT)

ISCUG Keynote May ESL goals Standardized interoperability of system level modeling methodologies Consistent SystemC based model library of all components for all purposes with a very limited set of modeling style options Standardized interfaces, tool independency Standards based ESL flow, master platform description that produces several possible simulation environments / SW runtimes Standard meta-data format for IP interfaces, requirements, constraints etc. Open issues –Processor and memory model standardization –Verification –Open integrated development environment Processor core model Interface (OSCI) Interconnect (OCP) Socket (OCP) Interface (OSCI) Socket (OCP) Interface (OSCI) Socket (OCP) Memory model Interface (OSCI) Socket (OCP) Configuration, debug, tracing, etc. (OCP, OSCI, SPIRIT) No unified agreed ESL flow, point-solutions even within individual ESL providers Bus interface compliancy, other capabilities missing Role of TLM/SystemC in design flows, preference as output language What is/are input language(s)?

ISCUG Keynote May Standardized interoperability of system level modeling methodologies Consistent SystemC based model library of all components for all purposes with a very limited set of modeling style options Standardized interfaces, tool independency Standards based ESL flow, master platform description that produces several possible simulation environments / SW runtimes Standard meta-data format for IP interfaces, requirements, constraints etc. Open issues –Processor and memory model standardization –Verification –Open integrated development environment ESL goals Processor core model Interface (OSCI) Interconnect (OCP) Socket (OCP) Interface (OSCI) Socket (OCP) Interface (OSCI) Socket (OCP) Memory model Interface (OSCI) Socket (OCP) Configuration, debug, tracing, etc. (OCP, OSCI, SPIRIT) Big expectations on IP-XACT ESL extensions, a promise of broad support from about all suppliers Approaches for processor modeling still hugely varying, may pose a problem on interoperability? Indications of approaches on co-verification in ESL, interoperability?

ISCUG Keynote May Standardized interoperability of system level modeling methodologies Consistent SystemC based model library of all components for all purposes with a very limited set of modeling style options Standardized interfaces, tool independency Standards based ESL flow, master platform description that produces several possible simulation environments / SW runtimes Standard meta-data format for IP interfaces, requirements, constraints etc. Open issues –Processor and memory model standardization –Verification –Open integrated development environment ESL goals Processor core model IP (proprietary) Behavior Interface (OSCI) Interconnect (OCP) Standard (SPIRIT) metadata-library Socket (OCP) IP (proprietary ) Behavior Interface (OSCI) Socket (OCP) Interface (OSCI) Socket (OCP) Memory model Interface (OSCI) Socket (OCP) Configuration, debug, tracing, etc. (OCP, OSCI, SPIRIT) Unified development and execution environments HW dependent SW on visionary roadmap of OSCI/Spirit High Level Synthesis tools not yet fully connected to overall platform model

ISCUG Keynote May Bridges to build, Barriers to break Language completeness –Model specification & support for consistency across abstraction levels –SW Development support Speed Debug, benchmarking & tuning Tools adoption –Proprietary technologies will not be sustainable –Interoperability, seamless flows is MUST HAVE: Architecture analysis tools HLS tools SW development platforms HW-SW co-verification solutions R&D Costs, ROI for IP & Si vendors

ISCUG Keynote May Language: OSCI std to IP users

ISCUG Keynote May Let’s Sum That Up

ISCUG Keynote May What Interfaces are There?

ISCUG Keynote May Language Expectations Summary Just SystemC is not enough: a vast range of incompatible options exist within that name Definitions of model types Level of abstraction Functional and timing accuracy Binary compatibility between models Machine-readable documentation of models Support for SW debug capabilities Support for SW, architecture performance analysis frameworks Kernel implementation – speed

ISCUG Keynote May Tools Adoption Dilemma of tools vendors for strict adherence to standards versus differentiated capabilities –Should fully operate in SystemC framework, leverage it maximally –Extensions are okay, but need to grow standard Model building/generation tools should support several abstractions Models need to be decoupled from environments –Si providers need to support tools of customer choice –Platform specific hooks inside models are a barrier –Built-in compilers, versions pose a nuisance Model ownership, Flexible license schemes –Tools licenses should be decoupled from model run-time licenses –Licensing schemes should support both internal use as well as external distribution of models, platforms

ISCUG Keynote May R&D Costs, ROI for IP, Si Vendors This is the catalyst for change Legacy infrastructure is a barrier However, IP subsystems are rapidly evolving encouraging a renewal of infrastructure, deployment There is a healthy ecosystem of Si vendors and IP providers Early modeling investments during chip definition “Software ready at Si” drives a strong need for virtual platforms and IP vendors to supply inter- operable models

ISCUG Keynote May India SCUG Opportunities India has all the elements: ESL, EDA houses, IP vendors, Si vendors, ODMs/OEMs, SW houses, … –Opportunity to drive the vision Contribute to the standard proactively –SW development capabilities of models (debug, analysis) –Model compatibility –Analog modeling

ISCUG Keynote May Thank you!