Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami1

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami2 Figure 23.1 Multiple metal layers provide intrasystem connectivity on microchips or printed-circuit boards.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami3 Figure 23.2 Example intersystem connectivity schemes.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami4 Table 23.1 Summary of three interconnection schemes

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami5 Figure 23.3 RS-232 serial interface 9-pin connector.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami6

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami7 Figure 23.4 Commonly used communication media for intersystem connections.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami8

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami9 Figure 23.5 The three sets of lines found in a bus.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami10 Figure 23.6 Synchronous bus with fixed-latency devices.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami11 Figure 23.7 Handshaking on an asynchronous bus for an input operation (e.g., reading from memory).

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami12 Figure 23.8 I/O read operation via PCI bus.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami13

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami14 Figure 23.9 General structure of a centralized bus arbiter.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami15 Figure Daisy chaining allows a small centralized arbiter to service a large number of devices that use a shared resource.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami16 Figure Wind vane supplying an output voltage in the range of 0–5 V depending on wind direction.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami17 Table 23.2 Summary of four standard interface buses.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami18 Figure USB connectors and connectivity structure.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami19 Figure IEEE 1394 (FireWire) connector. The same connector is used at both ends.

Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami20