Jihane Maalmi – Journées VLSI IN2P3 2010 A Simple And Complete USB Interface Package For Test Bench Development D.Breton, C.Cheikali, J.Maalmi (LAL Orsay)

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Jihane Maalmi – Journées VLSI IN2P A Simple And Complete USB Interface Package For Test Bench Development D.Breton, C.Cheikali, J.Maalmi (LAL Orsay)

Jihane Maalmi – Journées VLSI IN2P Introduction  USB 1.1 (~ 1 MBytes/s) Interface based on the FT245B circuit from FTDI.  A specific frame protocol has been defined to cover all usual acquisition modes. Data acquisition can be driven either by the program or by the peripheral. Interruptions are provided.  The package comprises hardware description, firmware and software: Requires just a few components on the board and little firmware in user’s FPGA. Software offers a complete library for Windows and Linux. C and LabView kits are available A configuration and test program is also provided  NEW! USB 2.0 (5 to 25 MBytes/s )Interface based on the FT2232H circuit from FTDI.  NEW! It is possible now to program Altera FPGAs in Active Serial mode through the USB2.0 interface!

Jihane Maalmi – Journées VLSI IN2P Overview of the USB Interface FTDI chip FPGA USB Interface Block FT245B, FT245R, FT2232C, FT2232H … OSC Altera Config EEPROM FTDI config EEPROM data Library + Test Software RD WR RXF TXE n_config conf_done nsco, dclk,asdi, epc_data Only with dual ports FTDI chips Are present inside FT245R

Jihane Maalmi – Journées VLSI IN2P FT245B Block Diagram FPGA interface OSC FT245 Config EEPROM FPGA USB connector PC  The entire USB Protocol is handled inside the chip  The FPGA interface is very simple, limited to an 8-bit data bus and 4 control lines USB Interface Block

Jihane Maalmi – Journées VLSI IN2P User Interface FPGA USB Interface Block n_read n_write data n_wait n_sync User Interface element 1 User Interface element N subadd 8 - An element can be: register, FIFO, RAM, a command… single_data_bus 7 usb_data 8 RD WR TXE RXF interrupt read_req  The USB Interface Block is entirely written in Verilog and can be implemented on any type of FPGA (Altera, Xilinx, Actel …) F T D I chip busy

Jihane Maalmi – Journées VLSI IN2P The frame protocol: Writing  USB is actually only a « byte pipe »: the bytes sent from the computer are just presented to the user side without any dedicated meaning.  Thus a simple and effective encapsulation frame protocol has been developed in order to distinguish between the different bytes. This protocol permits sending data frames and interrupts. It has been chosen to be the simplest possible in order to generate the minimum dead-time. The main principles are the following: A fixed header byte. A control byte with the number of bytes to transfer (minus 1 in order to permit all the values up to 256). A control byte to indicate the transfer direction and give the sub-address. N data bytes. A fixed trailer byte. Figure 7: chronogram of a write operation

Jihane Maalmi – Journées VLSI IN2P  The frame format is the same for the write and read transfers, which simplifies data identification.  For the write accesses, the number of bytes is limited to 256. For the read demands, the data field will be used to encode the MSB of the number of bytes to transfer, which is then able to reach (16 bits). Figure 8: chronogram of a standard read operation The frame protocol: Reading

Jihane Maalmi – Journées VLSI IN2P Use of ’n_wait’  For the slow peripherals, n_write and n_read can be retained as long as necessary thanks to the n_wait signal.

Jihane Maalmi – Journées VLSI IN2P Use of ‘busy’  The « busy » signal is used during all types of access. During standard read or write operations, it just covers the phase where acess is made to the peripheral.

Jihane Maalmi – Journées VLSI IN2P Interrupts  There are two types of interrups : Error Frames Interrupts (Header or Trailer) that are generated by the USB_Interface_Block User Interrupts that are generated by the peripheral user.  The interruption format is shown on tab 4.  It is a standard frame but where the R/W byte sent back equals 0, which is impossible in case of a standard reading (where it is equal to 1).  For a frame error Interrupt, the Subadd value is the one used in the last reading/writing operation  For a user interrupt, the Subadd value is 0x7F  A special Status Byte is reserved for Header and trailer errors  For user interrupt the Status Byte is determined by the user. There is a priority order for the interruptions: 1) Header, 2) Trailer, 3)User, 4) Read-request.

Jihane Maalmi – Journées VLSI IN2P Extended Read  Tab 5 describes the format of the frame transmitted to the computer after a read-request triggered by the user.  This type of frame permits a peripheral-driven acquisition mode of blocks up to 256 bytes.  This mode is supposed to offer the fastest dataflow

Jihane Maalmi – Journées VLSI IN2P Schematics of the FT245B-based USB Interface

Jihane Maalmi – Journées VLSI IN2P The Software library  LALUsbv2 Library: It is a library intended for software applications communicating over USB bus with boards using FT245xx or FT2232x controllers manufactured by FTDI Ltd. It is an extension of FTDI FTD2XX library: It provides a simplified error handling mechanism, a data encapsulation and an interrupt management complying with the specifications of the LAL USB Communication protocol. LALUsb has been designed to free the user from knowing about LAL frames format, for neither encoding nor decoding. LALUsb is mainly used as a “shared” library (DLL) but a “static” version (.lib file) is also available. LabView VI’s Library also available

Jihane Maalmi – Journées VLSI IN2P Examples of functions  Device initialization, open and close BOOL USB_FindDevices(char *DeviceDescriptionStr); int USB_GetNumberOfDevs(void); int OpenUsbDevice(char *sernumstr); unsigned char USB_GetVersion(int id); BOOL USB_Init (int id, BOOL verbose) ; void CloseUsbDevice(int id); BOOL USB_PurgeBuffers(int id);  Write and Read in « LAL » format int UsbWrt (int id, char sub_addr, void *buffer, int count); int UsbRd (int id, char sub_addr, void *array, int count);

Jihane Maalmi – Journées VLSI IN2P TEST 245 : Utility for Configuration and Test  Test245 : (Windows 2000 SP2, XP and Vista, MacOS X, Linux) Test245 is a little utility intended for testing and debugging freshly designed boards or devices based on FTDI FT245xx (and now also FT2232xx) family of USB controllers and complying with LAL USB Communication protocol It is also used to configure new devices. It relies on LALUsbv2 library functions to perform various input- output tests

Jihane Maalmi – Journées VLSI IN2P Device Configuration Wizard

Jihane Maalmi – Journées VLSI IN2P The FT245B-based interface has been used in IN2P3 and IRFU for different boards: Board Examples The MAROC2_USB test board for ATLAS Luminometer The Lumi_PM test board for ATLAS luminometer The ASPIC Back End Board ( for LSST) The MATACQ14 14-bit/2GS/s digitizer board The USB WaveCatcher Board

Jihane Maalmi – Journées VLSI IN2P Software Examples AlfaPMF application at CERN WaveCatcher SiPM Charge Histo The C program for ATLAS Lumi-PM acquisition The LabView program for MATACQ board acquisition

Jihane Maalmi – Journées VLSI IN2P What is new with the USB 2.0 Interface?  FT245, and FT2232D are limited to 1MByte/s  FT2232H offers the same asynchronous interface as the FT245 but with the ability to reach 5MBytes/s.  no change for the user interface in the FPGA (except the clock frequency)  no change for the software  FT2232H also offers a synchronous interface that adds only two wires to the FPGA interface but is supposed to reach 25 MBytes/s. (to be tested soon)  Possible changes for the user interface  no change for the software  FT2232H offers a second port that can be dedicated to FPGA EEPROM configuration. (also true with FT2232D)

Jihane Maalmi – Journées VLSI IN2P Schematics of the FT2232H-based USB Interface

Jihane Maalmi – Journées VLSI IN2P Documentation  Coming soon : Documentation of the Interface based on the FT2232H chip  Documentation of the LAL USB Interface based on the FT245 chip  Documentation the software library

Jihane Maalmi – Journées VLSI IN2P Conclusion  We have designed a very simple to use USB package It is Plug&Play It includes hardware, firmware and software It is available with different FTDI chips, depending on the application (…) A specific protocol has been developped, permitting all types of data transfer  1MByte/s versions have been used for 3 years for different labs and boards  5 to 25 (?) MBytes/S version is being developped  Hardware is already available for board design  All information on the web site: