Gedae Portability: From Simulation to DSPs to the Cell Broadband Engine James Steed, William Lundgren, Kerry Barnes Gedae, Inc. www.gedae.com 856 - 231-

Slides:



Advertisements
Similar presentations
Dario B. Crosetto 05/16/01 4 sec2 sec 4 sec2 sec 0 sec 1s 4 sec2 sec4 sec2 sec 1s Input every 6 seconds Output every 6 seconds Station (1d)Station (2d)Station.
Advertisements

Yaron Doweck Yael Einziger Supervisor: Mike Sumszyk Spring 2011 Semester Project.
Implementation of 2-D FFT on the Cell Broadband Engine Architecture William Lundgren Gedae), Kerry Barnes (Gedae), James Steed (Gedae)
Chapter 3 Computer Hardware and Peripherals: Your Digital Toolbox
By: Kathryn. Input Output Processing Memory Storage Devices.
Presented to: By: Date: Federal Aviation Administration Early Tests of Aircraft Tracking on NWRT PAR Working Group William Benner, Weather Processors Team.
THQ/Gas Powered Games Supreme Commander and Supreme Commander: Forged Alliance Thread for Performance.
Programming Multiprocessors with Explicitly Managed Memory Hierarchies ELEC 6200 Xin Jin 4/30/2010.
Fiber Channel Video Controller Students: Tsachy Kapchitz Michael Grinkrug Supervisor: Alex Gurovich in cooperation with: Elbit Systems המעבדה למערכות ספרתיות.
The Technion Israeli Institute of Technology Intel Inc. A cooperation of:
Project Overview MP3 player using USB-FLASH-DISK Yoav Gershoni Shachar Faigenblat.
Implementation of DSP Algorithm on SoC. Characterization presentation Student : Einat Tevel Supervisor : Isaschar Walter Accompany engineer : Emilia Burlak.
Embedded Computer Architecture 5KK73 MPSoC Platforms Part2: Cell Bart Mesman and Henk Corporaal.
0 HPEC 2010 Automated Software Cache Management.
Technology Round 7 Exploring I.C.T. in the Syllabus.
Getting Started With DSP A. What is DSP? B. Which TI DSP do I use? Highest performance C6000 Most power efficient C5000 Control optimized C2000 TMS320C6000™
USB host for web camera connection
1 Copyright © 2011, Elsevier Inc. All rights Reserved. Appendix E Authors: John Hennessy & David Patterson.
1 Systems Design Review Group P14345 Team Lead: William Sender Jeffrey Auclair Bryan Beatrez Michael Ferry.
Hardware Architecture of a real-world Digital Signal Processing platform: ADSP BlackFin Processor, Software Development on DSPs, and Signal Processing.
Christian Steinle, University of Mannheim, Institute of Computer Engineering1 L1 Tracking – Status CBMROOT And Realisation Christian Steinle, Andreas Kugel,
© 2005 Mercury Computer Systems, Inc. Yael Steinsaltz, Scott Geaghan, Myra Jean Prelle, Brian Bouzas,
Trigger design engineering tools. Data flow analysis Data flow analysis through the entire Trigger Processor allow us to refine the optimal architecture.
Ultra sound solution Impact of C++ DSP optimization techniques.
Gedae, Inc. Implementing Modal Software in Data Flow for Heterogeneous Architectures James Steed, Kerry Barnes, William Lundgren Gedae, Inc.
Unit 30 Digital Graphics Creating Graphics.
HPEC-1 MIT Lincoln Laboratory Session 3: Cloud Computing Albert Reuther/ MIT Lincoln Laboratory HPEC Conference 16 September 2010.
Gedae Portability: From Simulation to DSPs to the Cell Broadband Engine James Steed, William Lundgren, Kerry Barnes Gedae, Inc
Chapter 2 Computer Clusters Lecture 2.2 Computer Cluster Architectures.
TransAT Tutorial Particle Tracking July 2015 ASCOMP
Programming Examples that Expose Efficiency Issues for the Cell Broadband Engine Architecture William Lundgren Gedae), Rick Pancoast.
Team 22 Project-Virtual Whiteboard. Concept & Motivation Whiteboard is convenient, but you can’t carry it around. Writing/Drawing in software is useful,
HOME AUTOMATION HMI DEMO Michigan State University College of Engineering Team 3.
Tablet-PC Technology for Education Joe Monahan Engineering Distance Education Iowa State University Ames, Iowa USA
Spring 2007Lecture 16 Heterogeneous Systems (Thanks to Wen-Mei Hwu for many of the figures)
Group May Bryan McCoy Kinit Patel Tyson Williams Advisor/Client: Zhao Zhang.
© 2004 Mercury Computer Systems, Inc. FPGAs & Software Components Graham Bardouleau & Jim Kulp Mercury Computer Systems, Inc. High Performance Embedded.
Simple, Efficient, Portable Decomposition of Large Data Sets William Lundgren Gedae), David Erb (IBM), Max Aguilar (IBM), Kerry Barnes.
MULTIMEDIA INPUT / OUTPUT TECHNOLOGIES
Group May Bryan McCoy Kinit Patel Tyson Williams.
Operating Systems Objective n The historic background n What the OS means? n Characteristics and types of OS n General Concept of Computer System.
Hardware Benchmark Results for An Ultra-High Performance Architecture for Embedded Defense Signal and Image Processing Applications September 29, 2004.
High Performance Computing on an IBM Cell Processor Bioinformatics Team Members Kyle Byerly Shannon McCormick Matt Rohlf Bryan Venteicher Advisor Dr. Zhao.
LYU0703 Parallel Distributed Programming on PS3 1 Huang Hiu Fung Wong Chung Hoi Supervised by Prof. Michael R. Lyu Department of Computer.
Gedae, Inc. Gedae: Auto Coding to a Virtual Machine Authors: William I. Lundgren, Kerry B. Barnes, James W. Steed HPEC 2004.
Hardware/Software Basics Test
Application Software System Software.
1 Final Presentation Group P14345 Team Lead: William Sender Jeffrey Auclair Bryan Beatrez Michael Ferry.
Academic and pedagogical options in CIM laboratory CIM in universities.
CS 351/ IT 351 Modeling and Simulation Technologies HPC Architectures Dr. Jim Holten.
Review 1 Chapters Chapter 1 Understanding Computers, 12th Edition 2 Chapter 1 Explain why it is essential to learn about computers today and discuss.
Video Technology What you will be expected to learn in this class.
Dependable Multiprocessing with the Cell Broadband Engine Dr. David Bueno- Honeywell Space Electronic Systems, Clearwater, FL Dr. Matt Clark- Honeywell.
IDENTIFY COMPUTER FUNDAMENTALS A COMPUTER IS A ELECTRONIC DEVICE THAT PERFORMS THE FOUR BASIC OPERATIONS THAT COMPRISE THE INFORMATION PROCESSING CYCLE.
FFTC: Fastest Fourier Transform on the IBM Cell Broadband Engine David A. Bader, Virat Agarwal.
KERRY BARNES WILLIAM LUNDGREN JAMES STEED
Automobile Background ECU Parameters ( SAE Society of Automotive EngineersJ1979 ) – Speed – Engine RPM – Ignition on – Battery Boltage – VIN # – Fuel Trim.
Computer PARTS. What is hardware? The hardware are the parts of the computer itself including the Central Processing Unit (CPU), keyboards, monitors,
全面推开营业税改征 增值税试点政策培训. 什么是营改增? “营改增”中的“营”指的是营业税,“ 增”指的是增值税。对大多数企业来说,增 值税所带来的税负远低于营业税。 减税本身就是积极的财政政策。营改增所 实现的减税,不仅规模大、范围广,它本质 上是一种“结构性减税”,从而构成“结构 性改革”攻坚战中的实招。
Gedae, Inc. Implementing Modal Software in Data Flow for Heterogeneous Architectures James Steed, Kerry Barnes, William Lundgren Gedae, Inc.
Information Technology. *At Home *In business *In Education *In Healthcare Computer Uses.
High performance bioinformatics
GdX - Grid eXplorer parXXL: A Fine Grained Development Environment on Coarse Grained Architectures PARA 2006 – UMEǺ Jens Gustedt - Stéphane Vialle - Amelia.
High Performance Computing on an IBM Cell Processor --- Bioinformatics
Performance Tuning Team Chia-heng Tu June 30, 2009
Vision for Robotic Applications
شاخصهای عملکردی بیمارستان
مدل زنجیره ای در برنامه های سلامت
فرق بین خوب وعالی فقط اندکی تلاش بیشتر است
Multi Core Processing What is term Multi Core?.
Presentation transcript:

Gedae Portability: From Simulation to DSPs to the Cell Broadband Engine James Steed, William Lundgren, Kerry Barnes Gedae, Inc HPEC 2007: Multicore Processors and Their Impact on DoD HPEC Systems

The Software Architecture Makes Hardware Refreshes Difficult HPEC 2007 Gedae, Inc. 1 PE-0 Code 0 PE-1 Code 1 PE-2 Code 2 PE-3 Code 3 PE-A Code A PE-B Code B PE-C Code C PE-D Code D PE-E Code E PE-F Code F Old System New System

Application Environment Search and track using four audio channels Display using camera directed by pan-tilt unit HPEC 2007 Gedae, Inc. 2 Playstation 3 PPE USB Audio USB Gimbal Sys Mem Sys Mem SPE BUSBUS BUSBUS

Stages in Development Developed as simulation with file input and rendered output Deployed on quad PowerPC board, processing in real time at limited frame rate Hardware refresh to Cell Broadband Engine processor, processing more frames per second HPEC 2007 Gedae, Inc. 3