Instructor: Evgeniy Kuksin Preformed by: Ziv Landesberg Duration: 1 semester.

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Instructor: Evgeniy Kuksin Preformed by: Ziv Landesberg Duration: 1 semester

 Create a FIR filter that can process pulses from photon counting detectors and perform Peak Detection using NI Labview FPGA.

 Plan and build trapeziodal shaper in Labview  Create the trapeziodal shaper on the FPGA and test it at low clock rate  Test the system at high clock rate (150MHz), still on computer

 Test the filter on signal recived from analog signal generator  Implement the pulse detector

- + Photons ADC Shaper Peak Detector FPGA Readout To PC

FPGA(150MHz) A\D NI bit 150 MHz Signal generator (Preamplifier emulator)

 Trapezoidal can achive optimal noise performance from signal. Trapezoidal Shaper, unlike many analog pulse shaper, immune to “ballistic deficit”, that causes energy distortion in the spectrum.

 The Coefficients were calculated by the method at the article of “On nuclear spectrometry pulses digital shaping and processing”, the biexponential pulse part. the method is to inverse the transfer function of the pulse(making it a digital delta), and then convolute the delta with a trapezoid. Due to the fect that both the inverse function of the pulse and the trapezoid were finite length, the resulted filter was FIR.

 The input signal was generated at 2 main stages :  1) create an array with Poisson distributed digital delta’s in it. It was done by the Poisson noise generator, that each event was transformed to delta, and each none event was transformed to zero.  2 ) transfer the deltas to linear rising- exponential decaying pulse, was done simply by convoluting the array with the response of such pulse(with cut- off values lower than exp(-10 ))

The building of the filter in Labview was done using the fir template already existing in the program. So first stage was to create a fds file to generate filter from. The second stage was to use the automatic filter generation.

 FPGA that can be programmed using LABVIEW  Analog signal generator  A\D convertor

3.Show filter performance at high sample rate. 4.Build the pulse detector 31 June 15 June 31 may15 may30 April 15 Apri l 31 march 15 march Estima ted date Stage 3 Stage 4 Yellow- partially done Red- need to be done