Lecture 3 Dr. Muhammad Ayaz Computer Organization and Assembly Language. (CSC-210)

Intel Microprocessor History

Basic MP architecture n Fetch, decode, execute. n First instruction is a fetch Register Array control Instruction Register ALU Data Bus Address Bus Control Bus AF, BC, DE, HL, SP, PC many more

History of Microprocessor n Fairchild Semiconductors (founded in 1957) invented the first IC in n In 1968, Robert Noyce, Gordan Moore, Andrew Grove resigned from Fairchild Semiconductors. n They founded their own company Intel (Integrated Electronics). n Intel grown from 3 man start-up in 1968 to industrial giant by n It had 20,000 employees and $188 million revenue

History of Microprocessor n Current major manufactures and famous microprocessors. n Intel (x86, P1, P2, Atom, Dual Core, Core 2-Duo, Core i7) n Motorola (Motorola 6800, Motorola ) n AMD (AMD K5, AMD K6, AMD K8) n IBM (POWER6, Quad-core z196, Six-core zEC12)

Microprocessor History n 4-Bit Microprocessors n 8-Bit Microprocessors n 16-Bit Microprocessors n 32-Bit Microprocessors n 64-Bit Microprocessors

Microprocessor History..… n Intel 4004 (1971) u 0.1 MHz (740 KHz) u 4 bit u Program memory 4 KB u 16 index registers u World first Single chip microprocessor u Register set contained 16 registers of 4 bits each u It had 2,300 transistors u It could execute around 60,000 instructions per second.

Microprocessor History … n Intel 4040 (1974) u It was also 4-bit μP. u Program memory 8 KB u 24 index registers (two banks - 16 and 8 registers)

Microprocessor History n Intel 8008 (1972) u Max. CPU clock rate 0.5 MHz to 0.8 MHz u 8-bit CPU with an external 14-bit address bus u Could address 16KB of memory u Had 3,500 transistors

Microprocessor History n Intel 8080 (1974) u Second 8-bit microprocessor u Max. CPU clock rate 2 MHzCPUclock rate u Was 10 times faster than u Large 40-pin DIP packagingDIP u 16-bit address bus and an 8-bit data busaddress busdata bus u Easy access to 64 kilobytes of memorykilobytes u Processor had seven 8-bit registers, (A, B, C, D, E, H, and L)registers u It had 4500 transistors.

Microprocessor History n Intel 8086 (1978) u 16-bit microprocessor 16-bitmicroprocessor u Max. CPU clock rate 5 MHz to 10 MHzCPUclock rate u 20-bit external address bus gave a 1 MB physical addressMB u 16-bit registers including the stack pointerregistersstack pointer u The number of transistors increased to 29,000. u Over 100 million copies were sold.

Microprocessor History Intel (1978) – 16-bit x86 microprocessor 16-bitx86microprocessor – 134,000 transistors – Max. CPU clock rate 6 MHz to 25 MHzCPUclock rate – Run in two modes Protected mode Real mode

Microprocessor History Intel (1985) – 32-bit Microprocessor – 275,000 transistors – 16-bit data bus – Max. CPU clock rate 12 MHz to 40 MHzCPUclock rate

Microprocessor History n Intel (1989) u Max. CPU clock rate 16 MHz to 100 MHzCPUclock rate u FSB(frontside bus) speeds 16 MHz to 50 MHz FSB u 1,180,000 transistors u An 8 KB on-chip SRAM cache storesKBSRAMcache u 486 has a 32-bit data bus and a 32-bit address bus.data busaddress bus u Power Management Features and System Management Mode (SMM) became a standard feature

Microprocessor History n Intel Pentium I (1993) u Intel's 5th generation micro architecturemicro architecture u Operated at 60 MHz u A total of 3,100,000 transistors were used. u Powered at 5V and generated enough heat to require a CPU cooling fan u Level 1 CPU cache from 16 KB to 32 KBCPU cache u Contained 4.5 million transistors u compatible with the common Socket 7 motherboard configurationSocket 7

Microprocessor History n Intel Pentium II (1997) u Intel's sixth-generation microarchitecture u 296-pin Staggered Pin Grid Array (SPGA) package (Socket 7) u A total of 7,500,000 transisters were used. u speeds from 233 MHz to 450 MHz u Instruction set IA-32, MMX u cache size was increased to 512 KB u better choice for consumer-level operating systems, such as Windows 9x, and multimedia applications

Microprocessor History n Intel Pentium III (1999) u 400 MHz to 1.4 GHz u A total of 9,500,000 transisters were used. u L1-Cache: KB (Data + Instructions) L1-Cache u L2-Cache: 512 KB, external chips on CPU module at 50% of CPU-speed L2-Cache u the first x86 CPU to include a unique, retrievable, identification number

Microprocessor History Intel Pentium IV (2000) – Max. CPU clock rate 1.3 GHz to 3.8 GHzCPUclock rate – Instruction set x86 (i386), x86-64, MMX, SSE, SSE2, SSE3 Instruction setx86i386x86-64MMXSSE SSE2SSE3 – featured Hyper-Threading Technology (HTT)Hyper-Threading Technology – The 64-bit external data bus – More than 42 million (42,000,000) transistors. – Processor (front-side) bus runs at 400MHz, 533MHz, 800MHz, or 1066MHz – L2 cache can handle up to 4GB RAM – 2MB of full-speed L3 cache

Real Mode vs Protected Mode n In real mode, software communicates directly with the computer's ports and devices.computer's ports and devices u This paradigm doesn't work in a multitasking OS when multiple programs sent data streams to the ports simultaneously u Ports are dumb, and they have no ability to filter or arrange data streams to match the sending programs. n In protected mode, the system's ports and devices are protected from the applications that use them u The software thinks it's sending data to a port, but it's a virtual port. u The OS is grabbing the data stream and managing it, to ensure that all applications have equal access and to ensure that data from each application is appropriately preserved.

RISC and CICS n RISC (Reduces Instruction Set Computer) u More instructions and a simpler architecture u The tradeoff is performance, because the RISC is often so much faster than a CISC. u RISC processors use a small and limited number of instructions u RISC processors consume less power and are having high performance. u Each instruction is very simple and consistent. u RISC instruction is of uniform fixed length. u IBM RS6000, DEC’s Alpha 21064

RISC and CICS … n CISC (Complex Instruction Set Computer) u Relatively slow per instruction, but use fewer instructions. u It's easier to write powerful optimized compilers, since fewer instructions exist. u CISC chips have a large amount of different and complex instructions. u CISC processors are having limited number of registers. u Different machine programs can be executed on CISC machine. u Intel 386, 486, Pentium, Pentium Pro, Pentium II…

Dual-core n Dual-core means a processor is combining two independent processing cores into a single processor package. That means the processor can perform 2 tasks at the same time. All Intel(r) Core(tm) i3 processors are dual-core. 26

Stack Pointer n A stack pointer is a small register that stores the address of the last program request in a stack.registerstack n A stack is a specialized buffer which stores data from the top down.buffer n As new requests come in, they "push down" the older ones. n The most recently entered request always resides at the top of the stack, and the program always takes requests from the top.

Hyper threading n A technology developed by Intel that enables multithreaded software applications to execute threads in parallel on a single multi-core processor instead of processing threads in a linear fashion multithreadedsoftwareapplicationsexecutethreads n Hyper threading is a more advanced form of super threading. In hyper threading certain sections of the CPU are duplicated, so that the processor can appear, to the operating system, to be two logical processors. The operating system can then schedules two threads or processes to run simultaneously. 28

Multithreading n Multithreading: allows multiple threads to exist within the context of a single process, sharing the process resources but able to execute independently. It can allow a single process, to be executed in par n Dual core Pentiums do not have hyperthreading. i3 processors are still dual core, but have hyperthreading... so they can sometimes handle 4 threads at once. That would be the primary difference. i5 processors are true quad core, and i7 processors are quad core with hyperthreading.dual core n i7 9** series chips have 4 physical cores and through the use of Hyper Threading also have for logical cores - so task manager will show "8 cores 29

Cores and Threads i3 = 2 cores with 1 thread per core. i5 = 4 cores with 1 thread per core. i7 = 4 cores with 2 threads per core. (OS sees it as 8 cores) i9 = 6 cores with 2 threads per core. (OS sees it as 12 cores) 30