Logic Design (CE1111 ) Lecture 6 (Chapter 6) Registers &Counters Prepared by Dr. Lamiaa Elshenawy 1

Outlines  Finite State Machine  Registers  Shift Registers  Ripple Counters  Synchronous Counters 2

Finite State Machine  What is a finite state machine?  A finite state machine (FSM) is a tool used to design sequential logic circuits  FSM can be described by 1. A set of input events, a set of output events, and a set of states 2. State equation ( a function that maps states and input to output) 3. State table 4. State diagram 3

Finite State Machine 4 FSM Mealy State machine Moore State machine Mealy model: the output is a function of both the present state and the input Moore model: the output is a function of only the present state George H. Mealy (December 31, 1927– June 21, 2010) is an American mathematician and computer scientist who invented the Mealy machine Edward Forrest Moore (November 23, 1925–June 14, 2003 in) is an American professor of mathematics & computer science, the inventor of the Moore machine

Finite State Machine 5

6 Mealy model Moore model

Registers  What is a register? 1. A register is a group of flip ‐ flops, each one of which shares a common clock and is capable of storing one bit of information 2. An n ‐ bit register consists of a group of n flip ‐ flops capable of storing n bits of binary information 3. A register consists of flip ‐ flops & combinational gates 4. Flip ‐ flops hold binary information & combinational gates determine how the information is transferred into the register 7

Registers 8 Four-bit register

Registers 9  When the load input is 1, the data at the four external inputs are transferred into the register with the next positive edge of the clock  When the load input is 0, the outputs of the flip ‐ flops are connected to their respective inputs  The feedback connection from output to input is necessary because a D flip ‐ flop does not have a “no change” condition Four-bit register with parallel load

Shift Registers  What is a shift register? 1. A shift register is register that is capable of shifting the binary information held in each cell to its neighboring cell 2. A shift register consists of a chain of flip ‐ flops in cascade, with the output of one flip ‐ flop connected to the input of the next flip ‐ flop 3. All flip ‐ flops receive common clock pulses, which activate the shift of data from one stage to the next 10

Shift Registers 11 Four-bit shift register

Shift Registers 12

Counters  What is a counter? 1. A counter is essentially a register that goes through a predetermined sequence of binary states 2. Gates in the counter are connected in such a way to produce the prescribed sequence of states 3. Although counters are a special type of register, it is 4. common to differentiate them by giving them a different name 13

Counters 14 Counters Ripple Counter Synchronous Counter Ripple counter: counter inputs of flip ‐ flops are triggered by clock pulses & other flip ‐ flop outputs Synchronous counter: counter inputs of all flip ‐ flops receive the common clock

Ripple Counters 15 Four-bit ripple binary counter

Synchronous Counters 16 Four-bit binary synchronous counter

Synchronous Counters 17 Four-bit up-down binary counter  When the up input is 1, the circuit counts up  When the down input is 1 and the up input is 0, the circuit counts down  When the up and down inputs are both 0, the circuit does not change state and remains  When the up and down inputs are both 1, the circuit counts up (the up input has priority over the down input)

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Important Websites 1. tutorials.ws/sequential/seq_5.html tutorials.ws/sequential/seq_5.html hpt-11/synchronous-counters/ hpt-11/synchronous-counters/ 6. cs&safe=active&source=lnms&tbm=isch&sa=X&ve d=0ahUKEwjLpN- XoZPMAhXHlxoKHQzyBw8Q_AUIBygB&biw=1152&b ih=525#imgrc=QKkv82TO_7P1JM%3A cs&safe=active&source=lnms&tbm=isch&sa=X&ve d=0ahUKEwjLpN- XoZPMAhXHlxoKHQzyBw8Q_AUIBygB&biw=1152&b ih=525#imgrc=QKkv82TO_7P1JM%3A 19