Digital RF control at LBNL Gang Huang on behalf of the LBNL LLRF team LLRF2015

LLRF LBNL Baptiste, Kenneth M. Byrd, John M Chen, Qi Doolittle, Lawrence R. Du, Qiang Huang, Gang Jones, John Alexander Norum, Eric Ratti, Alessandro Serrano, Carlos Pareja Stettler, Matthew Werner Wilcox, Russell B Xu, Yilun Yang, Jin Yang, Yawei

Linear Coherent Light Source – II (LCLS–II) Collaboration with SLAC, FNAL, JLAB System architecture design Modular NAD (network attached device) design Separation of high precision receiver and RF drive station Common FPGA boards in modules End-to-end simulation Noise sensitivity analysis Microphonics LLRF / beam dynamics / cavity model Tuesday 13:45 Analog-centered LLRF System Design for LCLS-II Larry Doolittle Thursday 9:45 End-to-end FEL Beam Stability Simulation Engine Carlos Serrano

CryoModule On Chip (CMOC) Linac, Cryomodule, Cavity model Feedback algorithm Mechanical modes AC701 evaluation board Wednesday 15:15 Accelerator-On-Chip Simulation Engine Larry Doolittle

Linear Coherent Light Source – II (LCLS–II) Precision Receiver Chassis Digitizer/Analogizer board – Evaluate different ADC chips High speed SERDES (serializer/deserializer) IF signal conditioning Power and reference voltage stability – Digitizer board design

Advanced Photoinjector Experiment (APEX) phase II APEX operation UHF (187MHz) gun interlock Laser RF synchronization APEX Phase-II 1.3GHz normal conducting buncher and acceleration section

Tsinghua X-ray Gammary ray Light source (TXGLS) Thomson scattering light source High precision timing – RF reference distributed over fiber – Optical interferometer – feedforward LLRF control – S band linac, 10Hz – Multiple drive mode Laser control – Gun drive – Scattering Friday 9:40 Integrated phase reference distribution, LLRF and laser synchronization system Gang Huang Wednesday 15:15 Phase averaging reference line based on modulated reflection signal Jin Yang

LLRF in Advanced Light source (ALS) RF upgrade Hybrid configuration of two klystrons driving two cavities for higher power and reliability. – KC DSP FMC112 / FMC116 / FMC150 Wednesday 15:15 Design and development of Advanced Light Source Storage Ring LLRF system Qiang Du

RF control for Laser pulse stacking Collaboration with UM Plan to use RF Control – Pulse by pulse 400M Laser pulse amplitude and phase modulation – Optical cavity phase stabilization – Modulator bias control ML DSP FMC110

Hardware capability FPGA carrier board – MP7/BMB7/LLRF4 – SP601/SP605/ML605/AC701/KC705 FMC mezzanine card – ADC evaluation board/Digitizer board – 4dsp FMC110/FMC150/FMC112/FMC116 – Xilinx XM105 Analog front end – Up/Down converter (500MHz, 1.3GHz, 2856MHz)

Firmware/software development Work module: PI, SEL, CORDIC….. Chip driver: ADC, DAC……. Hierarchical register structure USB / UDP Streaming mode / inquiry mode C driver / Python / EPICs / redis

Beam Instrument Development System (BIDS) HDL libraries – Common hdl – Chip driver – Communication protocol Software base – EPICs ioc driver – Python driver – C driver Wednesday 15:15 Towards Beam Instrument Development System Gang Huang

Summary Multiple on-going projects cover wide parameter space – NC/SC – CW/pulsed – frequency 187M, 500M, 1300M, 2856M, 200T While juggling among different projects, maintain and expand our core capabilities: – Understand the physics of the plants – Develop high performance hardware – Develop control algorithm – System integration

Talks and posters Talks – Analog-centered LLRF System Design for LCLS-II – End-to-end FEL Beam Stability Simulation Engine – Integrated phase reference distribution, LLRF and laser synchronization system Posters – LCLS-II precision acquisition board prototype – Design and development of Advanced Light Source Storage Ring LLRF system – Accelerator-On-Chip Simulation Engine – Towards Beam Instrument Development System – Phase averaging reference line based on modulated reflection signal