VIRTUAL NETWORK PIPELINE PROCESSOR Design and Implementation Department of Communication System Engineering Presented by: Mark Yufit Rami Siadous Project Supervisor: Prof. Ran Giladi
Project’s Goal Designing and implementing a Virtual Network Processor, programmable environment optimized for implementation and execution of packet handling applications, based on pipeline technology, with Graphical User Interface Communication systems engineering
Agenda Introduction to Packet Processing –Processing functions and their use Project Components: –Packet Processing Assembly Language –The Core –The GUI Communication systems engineering
Introduction to Packet Processing Communication systems engineering
Packet Processing Functions Parsing and Framing Search and Classification Modification Other functions –Traffic Management –Compression and Encryption –Context matching Communication systems engineering Segmentation Fragmentation Fields extraction CRC check Type discovery Data base search Making decisions Applying rules Fields change Fields remove Copy packet Drop packet
Parsing Communication systems engineering BD AB FE B0000 8BEE7C1E 00BD A1 0C A0B0C0D 0E0F A1B1C1D 1E1F A2B2C2D 2E2F B24C8 D E 0800 S-MACD-MAC TYPE = IP Datagram 1- Parse Fields 2- Classify Frame IP datagram forwarding (simplified) Example Packet arrives!!!
Parsing Communication systems engineering B BD AB FE B0000 8BEE7C1E 00BD A1 0C A0B0C0D 0E0F A1B1C1D 1E1F A2B2C2D 2E2F DIP 1- Parse Fields Next layer parsing
Search Communication systems engineering Find interface addresses for IP: B IPMaskSMACDMAC FFFFFF E D FFFF E D C FF F0024A6093A65
Modification Communication systems engineering BD AB FE B0000 8BEE7C1E 00BD A1 0C A0B0C0D 0E0F A1B1C1D 1E1F A2B2C2D 2E2F D E D-MAC S-MAC Modify and Forward Frame
Packet Processing Language Communication systems engineering
POVNA PDU Oriented Virtual Network Assembler High-level function invocations High-level data types Architecture independent Protocol independent Modularity Simple in use Communication systems engineering
System Overview Communication systems engineering
Architectures Single thread –Packet passes sequentially via sub-modules, next packet enters after the first finishes Multi-Threaded –Parallel Many instructions are carried out simultaneously, operating on the principle that large problems can often be divided into smaller ones, which are then solved concurrently –Pipeline Chain of processing elements arranged so that the output of each element is the input of the next Communication systems engineering
Engines Five stage pipeline Every stage called engine
System Integration Communication systems engineering CORE Every engine has one way connection to its neighbor ‘Neighbors’ talk via mutual memory module Shared memory contains information useful for every stage
Input and Output Engine Communication systems engineering Input (ingress) Packet is collected from network device Output (egress) Packet is sent to network device
Extraction Engine Communication systems engineering ABC D E Packet arrives Packet is parsed, classified… …useful fields are extracted
Lookup & Logic Engine Communication systems engineering A F G A? Extracted field… …is used for search at lookup table… …additional fields are gathered …the entry is found and returned...
Modification Engine Communication systems engineering FG E New packet is assembled……and sent to egress side
Graphical Interface Communication systems engineering
System Integration Communication systems engineering GUI Implemented on Java Uses XML configuration files Basic project definitions Protocols configuration Engines setup Modules programming
EE Configuration Communication systems engineering Fields description Protocol Definition Visual configuration Fields logic Help panel Project configuration
Integration of GUI with POHLA Communication systems engineering
Project Use Communication systems engineering Platform for every “smart” network device or application –Routers –Switches –Firewalls –Network Monitors
Future Work Communication systems engineering Building optimized compiler POVNA additional controls and structures expansion Graphical modules Additional engines creation Development of HW chip
The End Questions ? Communication systems engineering