How do ABI test Digital ICs?

Test principles ABI digital tests are designed to find faults on boards. To do this the following principles are used: Confirm that the IC is correctly wired, correctly driven and correctly powered Confirm that the input and output pins are not damaged and that the IC is not overloaded Confirm that the IC functions according to its truth table

Output drivers and BDO signals isolated by relays 1. High voltage test 5V power supply switched on Check all pins voltages within -0.5V to +5.5V range

2. Auto clip positioning Output isolation relays switched on BDO signals enabled VCC voltage must be >4.6V Ground voltage must be <0.6V Locates position of IC using supplies

3. Pin impedance test Checks how pins of IC are driven Drives pin with various voltages through 10K resistor Pins classified as: Output (displays blank) Undriven TTL input FLOT High impedance CMOS input OPCT

Shows pins connected to supply rails (5V or 0V) 4. Shorted pin test Drives pins to opposite levels >4.4V indicates short to 5V <0.6V indicates short to 0V

Identifies links between pins on same IC 5. Link detection Shorted pins are ignored Pin pairs analysed to identify matching change when driven Procedure repeated for all possible pairs in both directions Results stored for use by circuit compensation feature later

Measures IC input voltages 6. Input mid level test Compares with threshold voltages Voltages above the low threshold and below the switching voltage are displayed as INPUT MID LOW IPML Voltages below the high threshold and above switch are displayed as INPUT MID HIGH IPMH

Detects changing signals by checking levels on each pin 7. Input signal detection Checks each pin 256 times asynchronously Different levels show as SIGNAL Detects signals below 4MHz

Checks for valid low and high logic levels to allow truth table test 8. Input backdrive check Checks each output by driving low and high In-circuit low drive should be 1.9V Out-of-circuit low drive should be 2.5V Ignores pins shorted to rails

Checks IC outputs for shorts 9. Output short check Displays SH0V for short to 0V Displays SH5V for short to 5V Open-collector and open-emitter in wired-OR design are logical therefore will not fail outputs

Enables input channels 10. Output configuration Shorted pins not enabled For bi-directional or multiple gates, pins enabled only as required to reduce power dissipation Output pin position given by auto clip positioning

In-circuit testing of tri-state ICs 11. Output conflict test Disables IC Measures impedance of output pins (high impedance expected) Displays CFLT on driven pins if not high impedance

Stimulates IC whilst backdriving other signals in-circuit 12. Truth table test Compares output voltages with programmed logic thresholds Invalid logic levels displayed Automatic circuit compensation allows ‘as wired’ testing by altering IC test program

Measures voltages on each pin 13. Voltage test Pins connected to 0V via 10K resistor Displays results Compares to programmed thresholds for logic levels

Power-off test 14. Thermal test Performs modified digital V-I test Uses forward junction voltage as function of temperature Indicates overloaded ICs

Power-off test 15. Digital V-I test Examines current against voltage for each pin Pins driven through 10K resistor Linear voltage sweep between - 10V and +10V Input leakage voltage breakdown and shorts identified Optimised for digital ICs

Select LOOP test. Repeat test. Loop or fail loop selected? Device fails Open circuits present? Signal indicated on pins? Are conflicts identified? Suspect clip connection. Move clip to remove invalid open circuits. Does device have a clock pin? Is signal present? Is origin and IC gate? Stop clock or processor to stabilise BUS. Locate other devices on BUS and check enable pins. Are BUS devices enabled? Use BDO to disable devices.

Summary Truth table testing is just a small part of the ABI test philosophy. To get the best results all of the test types should be utilised as much as possible. Understanding how the equipment gets the information speeds up the success in fault-finding.