Broad Market Select Program Jan–Mar 2014 The World Leader in High Performance Signal Processing Solutions ADA2200 ADA4805-1/ADA ADA4961 AD5761R AD9136 AD9234 ADuM315x/ADuM415x ADG54xxF ADP7118/ADP7142 ADF5355 HMC1049LP5E HMC832LP6GE Q Broad Market Select Products

ADA2200ADA2200: Synchronous Demodulator and Configurable Analog Filter Additional Information Evaluation Board: ADA2200-EVALZADA2200-EVALZ EngineerZone ® : AmplifiersAmplifiers SPICE Model: ADA2200ADA2200 Press Release: Lyric Semiconductor AcquisitionLyric Semiconductor Acquisition Supply Voltage Range Filter Architecture Filter Type Temperature Range Package 1k (U.S.$) 2.7 V to 3.6 V Sampled analog technology IIR 4 th order IIR –40°C to +85°C 16-ld TSSOP $2.95 2

ADA4805-1ADA4805-1/ADA4805-2: Single-Channel/Dual- Channel ADC Driver for 12-, 14-, and 16-Bit SAR ADCADA Key Features Low input offset voltage: 125 μV (maximum) Low input offset voltage drift  0.2 μV/°C (typical)  1.5 μV/°C (maximum) Ultralow supply current: 500 μA per amplifier Fully specified at V S = 3 V, 5 V, ±5 V High speed performance  –3 dB bandwidth: 105 MHz  Slew rate: 160 V/μs  Settling time to 0.1%: 35 ns Rail-to-rail outputs Input common-mode range: –V S – 0.1 V to +V S – 1 V Low noise: 5.9 nV/√Hz at 100 kHz; 0.6 pA/√Hz at 100 kHz Low distortion: –102 dBc/ –126 dBc HD2/HD3 at 100 kHz Low input bias current: 470 nA (typical) Dynamic power scaling  Turn-on time: 3 μs (maximum) fully settled Additional Information Evaluation Board: ADA4805-1, ADA4805-2ADA4805-1ADA EngineerZone: AmplifiersAmplifiers SPICE Model: ADA4805ADA4805 Supply Voltage Range Supply Current Max V OS Drift Max Temperature Range Package 1k (U.S.$) 2.7 V to 10 V0.52 mA1.5 µV/°C–40°C to +125°C 6-ld SOT-23, 6-ld SC70 8-ld MSOP Single: $0.95 Dual: $1.64 3

ADA4961ADA4961: 3.2 GHz Differential GSPS ADC Driver Key Features High speed  –3 dB bandwidth: 3.2 GHz  –1 dB bandwidth: 1.8 GHz  Slew rate: 12,000 V/μs Digitally adjustable gain  Voltage gain: –6 dB to +15 dB  Power gain: –3 dB to +18 dB  5-bit parallel or SPI bus gain control with fast attack IMD3/HD3 distortion, maximum gain, 5 V, high performance  (HP) mode  IMD3/HD3 at 1 GHz: –90 dBc/–83 dBc  IMD3/HD3 at 1.5 GHz: –85 dBc/–75 dBc  IMD3/HD3 at 2 GHz: –70 dBc/–70 dBc Low noise  Noise figure: 5.6 dB at A V = 15 dB Differential impedances: 100 Ω input, 50 Ω output Low power mode operation, power-down control Single 3.3 V or 5 V supply operation Additional Information Evaluation Board: ADA4961ADA4961 EngineerZone: RF ComponentsRF Components ADIsimRF 3 dB Small Signal BW IMD3/HD3 Gain Range Temperature Range Package 1k (U.S.$) –3 dB at 3.2 GHz –85 dBc (1.5 GHz) 1.2 V p-p composite 15 dB–40°C to +85°C 24-ld LFCSP $ Gain vs. Frequency

AD5761RAD5761R: 16-Bit User-Programmable Unipolar/ Bipolar, Voltage Output DAC Key Features Feature set: DAC, REF, output buffer, software configurable, V OUT range 8 software-programmable output ranges:  0 V to 5 V, 0 V to 10 V, 0 V to 16 V, 0 V to 20 V, ±3 V, ±5 V, ±10 V, and −2.5 V to +7.5 V; 5% overrange Low drift 2.5 V reference: ±2 ppm/°C typical Total Unadjusted Error (TUE): 0.1% FSR maximum Guaranteed monotonicity: ±1 LSB maximum Single-channel, 16-/12-bit DACs Settling time: 7.5 μs typical Integrated reference buffers Low noise: 35 nV/√Hz Low glitch: 1 nV/s (0 V to 5 V range) 1.7 V to 5.5 V digital supply range Asynchronous updating via LDAC Asynchronous reset to zero scale/midscale DSP/microcontroller-compatible serial interface Robust 4 kV HBM ESD rating Additional Information EngineerZone: Precision DACsPrecision DACs IBIS File: AD5761RAD5761R EE Times: “Designing DACs into Precision Industrial 10 V Applications”Designing DACs into Precision Industrial 10 V Applications Software Configurable TUEINL Temperature Range Package 1k (U.S.$) Yes0.1% FSR max±2 LSB–40°C to +125°C 16-ld TSSOP $3.75 (A) $4.85 (B) 5

AD9136AD9136: Dual, 16-Bit, 2.8 GSPS TxDAC+ DAC Key Features Support input data rate > 2 GSPS Proprietary low spurious and distortion design  SFDR = 82 dBc at DC IF, −9 dBFS  Flexible 8-lane JESD204B interface Multiple chip synchronization  Fixed latency  Data generator latency compensation Selectable 1×, 2×, 4×, or 8× interpolation filter  Low power architecture Transmit enable function allows extra power saving and instant control of the output status High performance, low noise Phase-Locked Loop (PLL) clock multiplier Digital inverse sync filter Low power: 1.42 W at 1.6 GSPS full operating conditions Additional Information Evaluation Board: AD9136-EBZAD9136-EBZ EngineerZone: High Speed ADC, FPGA Reference Designs Support, Linux Device Drivers SupportHigh Speed ADCFPGA Reference Designs SupportLinux Device Drivers Support Data Conversion Knowledge Resource Resolution Sample Rate Data Rate Temperature Range Package 1k (U.S.$) 16-bit2.8 GSPS2.12 GSPS–40°C to +85°C88-ld LFCSP$

AD9234AD9234: Dual, 12-Bit, 1000 MSPS ADC Key Features JESD204B (Subclass 1) coded serial digital outputs 1.5 W total power per channel at 1 GSPS (default settings) SNR = 63.4 dBFS at 340 MHz (A IN = −1.0 dBFS) ENOB = 10.4 bits at 10 MHz DNL = ±0.16 LSB INL = ±0.35 LSB Noise density = −151 dBFS/Hz at 1 GSPS 1.25 V, 2.5 V, and 3.3 V DC supply operation No missing codes Internal ADC voltage reference Flexible termination impedance  400 Ω, 200 Ω, 100 Ω, and 50 Ω differential 2 GHz usable analog input full power bandwidth 95 dB channel isolation/crosstalk Amplitude detect bits for efficient AGC implementation Differential clock input Optional decimate-by-2 DDC per channel Differential clock input Integer clock divide by 1, 2, 4, or 8 Flexible JESD204B lane configurations Small signal dither Additional Information Evaluation Board: AD9234AD9234 EngineerZone: High Speed ADC, FPGA Reference Designs Support, Linux Device Drivers SupportHigh Speed ADCFPGA Reference Designs SupportLinux Device Drivers Support SFDRSample Rate Full Power Bandwidth Temperature Range Package 1k (U.S.$) MHz 1000 MSPS2000 MHz–40°C to +85°C 64-ld LFCSP $

ADuM315xADuM315x/ADuM415x: SPIsolator ® Dedicated Digital Isolator for SPI CommunicationsADuM415x Key Features Supports up to 40 MHz SPI clock speed in delay clock mode Supports up to 17 MHz SPI clock speed in 4-wire mode Four high speed, low propagation delay, SPI signal isolation channels Two data channels at 250 kbps Delayed compensation clock line High common-mode transient immunity: >25 kV/μs Safety and regulatory approvals  UL recognition per UL 1577 (pending) 3750 V rms for 1 minute CSA Component Acceptance Notice 5A (pending), VDE certificate of conformity (pending)  DIN V VDE V (VDE V ): 2006 to 2012  V IORM = 560 V PEAK Additional Information Evaluation Board: ADuM3150/ADuM4150; ADuM3151/ADuM3152/ADuM3153/ADuM4151/ ADUM4152/ADuM4153; ADuM3154/ADuM4154ADuM3150/ADuM4150 ADuM3151/ADuM3152/ADuM3153/ADuM4151/ ADUM4152/ADuM4153ADuM3154/ADuM4154 EngineerZone: Interface and Digital IsolationInterface and Digital Isolation Channels Clock Speed Isolation Rating (kV rms) Temperature Range Package 1k (U.S.$) ADuMx150: 640 MHzADuM315x: 3.75 –40°C to +125°C ADuM315x: 20-ld SSOP $2.15 to $4.80 ADuMx151/2/3/4: 7 1 MHz or 17 MHz ADuM415x: 5 ADuM415x: 20-ld SOIC 8

ADG54xxFADG54xxF: Family of Fault Protection and Detection, Low R ON Switches and Multiplexers Key Features Overvoltage protection up to −55 V and +55 V Power-off protection up to −55 V and +55 V Overvoltage detection on source pins Low on resistance: 10 Ω  On resistance flatness of 0.5 Ω 5.5 kV Human Body Model (HBM) ESD rating Latch-up immune under any circumstance Known state without digital inputs present V SS to V DD analog signal range  ±5 V to ±22 V dual-supply operation  8 V to 44 V single-supply operation  Fully specified at ±15 V, ±20 V, +12 V, and +36 V Additional Information Evaluation Board: ADG5412F, ADGG5413F, ADG5412BF, ADG5413BFADG5412FADGG5413FADG5412BF ADG5413BF IBIS Files: Available Dec 2014 Overvoltage Protection Range Human Body Model (HBM) ESD Level On Leakage Temperature Range Package 1k (U.S.$) Up to ±55 V5.5 kV 1 25°C max, 4 125°C Max –40°C to +125°C 16-ld TSSOP, 16-ld LFCSP $3.96 9

ADP7118ADP7118/ADP7142: 20 V/40 V, 200 mA, Low Noise, High PSRR CMOS LDOADP7142 Key Features Input voltage: 2.7 V to 20 V 9 (ADP7118), 2.7 V to 40 V (ADP7142) Low noise: 11 μV rms independent of fixed output voltage PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, V OUT ≤ 5 V, V IN = 7 V Input voltage range: 2.7 V to 20 V Initial accuracy: ±0.8% accuracy over line, load, and temperature  ± 1.1%, TJ = −40°C to +85°C  ± 1.8%, TJ = −40°C to +125°C Low dropout voltage: 200 mV (typical) at a 200 mA load, V OUT = 5 V User-programmable soft start (LFCSP and SOIC only) Low quiescent current, I GND = 50 μA (typical) with no load Low shutdown current: 1.8 μA at V IN = 5 V, 3.0 μA at V IN = 20 V Stable with a small 2.2 μF ceramic output capacitor Fixed output voltage options: 1.8 V, 2.5 V, 3.3 V, and 5.0 V 16 standard voltages between 1.2 V and 5.0 V are available Adjustable output from 1.2 V to V IN – V DO, output can be adjusted above initial set point Precision enable Additional Information Evaluation Board: ADP7118 and ADP7142ADP7118 and ADP7142 EngineerZone: Power ManagementPower Management ADIsimPower and Other Power Management Tools Output Load Current 100 kHz Output Noise Temperature Range Package 1k (U.S.$) 200 mA68 dB11 μV rms–40°C to +125°C 6-ld LFCSP, 5-ld TSOT, 8-ld SOIC ADP7118: $0.96 ADP7142: $

ADF5355ADF5355: 13.6 GHz Microwave Wideband Synthesizer with Integrated VCO Key Features RF output frequency range: 54 MHz to 13,600 MHz Fractional-N synthesizer and integer-N synthesizer High resolution 38-bit modulus Phase Frequency Detector (PFD) operation to 125 MHz Reference frequency operation to 600 MHz Maintains frequency lock over –40°C to +85°C Low phase noise, voltage controlled oscillator (VCO) Programmable divide by 1, 2, 4, 8, 16, 32, or 64 output Analog and digital power supplies: 3.3 V Charge pump and VCO power supplies: 5 V, typical Logic compatibility: 1.8 V Programmable dual modulus prescaler of 4/5 or 8/9 Programmable output power level RF output mute function Analog and digital lock detect Supported in the ADIsimPLL design tool.ADIsimPLL Additional Information Evaluation Board: ADF5355ADF5355 EngineerZone: RF ComponentsRF Components Press Release: ADF5355ADF5355 Maximum Frequency Power Consumption Maximum PFD Temperature Range Package 1k (U.S.$) 13,600 MHz750 mW125 MHz–40°C to +85°C 32-ld LFCSP $ Functional Block Diagram

HMC1049LP5EHMC1049LP5E: 0.3 GHz to 20 GHz GaAs MMIC Low Noise Amplifier Key Features Noise figure: 1.8 dB P1dB output power: dBm Psat output power: dBm High gain: 15 dB Output IP3: +29 dBm Supply voltage: V DD = mA 50 Ω matched input/output Additional Information Evaluation Board: HMC1049LP5EHMC1049LP5E EngineerZone: Hittite Microwave Products from ADIHittite Microwave Products from ADI Qualification Test Reports S-Parameter Video Press Release GainNoise Figure Frequency Range Temperature Range Package 1k (U.S.$) 15 dB 1.8 dB GHz GHz 0.3 GHz to 20 GHz –40°C to +85°C 32-ld SMT 32-ld QFN $ Output IP3 vs. Temperature

HMC832LP6GEHMC832LP6GE: 3.3 V PLL with Integrated VCO for RF Bandwidth 25 MHz to 3000 MHz Key Features RF bandwidth: 25 MHz to 3000 MHz 3.3 V Supply Maximum phase detector rate: 100 MHz Ultralow phase noise: –110 dBc/Hz in band typical Fractional Figure of Merit (FOM): –226 dBc/Hz 24-bit step size, resolution 3 Hz typical Exact frequency mode with 0 Hz frequency error Fast frequency hopping Additional Information Evaluation Board: Ekit01-HMC832LP6GEEkit01-HMC832LP6GE EngineerZone: Hittite Microwave Products from ADIHittite Microwave Products from ADI User Manual Schematic Qualification Test Reports Application Note Press Release Number of Outputs VCO Flicker FOM Programmable Performance Temperature Range Package 1k (U.S.$) 2/1–154 dBc/HzYes–40°C to +85°C 40-ld SMT $ Typical Closed-Loop Integer Phase Noise