Thin films sami.franssila@aalto.fi.

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Thin films sami.franssila@aalto.fi

Thin films: different from bulk? Thickness: nm to µm Properties thickness dependent electrical (resistivity) optical (transmission) mechanical (Young’s modulus) thermal (conductivity) Structure: amorphous, polycrystalline or single crystalline Structure depends on deposition method Structure changes in high temperature steps Often severe stresses (tensile or compressive)

Thickness dependent resistivity

Thickness dependent dielectric constant Atomic Layer Deposited SrTiO3 Vehkamäki

Thickness dependent structure High resolution TEM pictures ALD deposited ZrO2: the 4 nm thick film Is amorphous. ALD deposited ZrO2: 12 nm thick film is polycrystalline. from ref. Kukli 2007.

PVD: Physical Vapor Deposition The whole wafer is covered by the deposited film.

Evaporation Simple: Heat metal until vapor pressure high enough  metal vapor will be transported in vacuum to the wafer. Metal vapor condensation results in film growth. Very few parameters to change  Cannot optimize film quality. electron beam gun wafer crucible

Sputtering Electric field excites argon plasma. wafer target Electric field excites argon plasma. Accelerated argon ions hit metal atoms from target. Target atoms are transported in vacuum to the wafer. Many parameters: power, pressure, temperature, gas specie (Ar usually)

Metallic films usually by PVD conductors (Al, Au, Cu) resistors (Ta, W, Pt) capacitor electrodes (poly-Si, Al, Mo) mechanical materials (Al-movable mirrors) magnetic materials (Ni coils) protective coatings (Cr, Ni etch masks) optical materials (mirrors, reflectors, IR filters) catalysts (Pt, Pd in chemical sensors)

Rs  /T Sheet resistance Rs is in units of Ohm, but it is usually denoted by Ohm/square to emphasize the concept of sheet resistance. Resistance of a conductor line can now be easily calculated by breaking down the conductor into n squares: R = nRs Aluminum film 1 µm thick, sheet resistrance ? Tungsten film, 100 nm thick, sheet resistance ?

Resistor sheet resistance Figure 2.8: Conceptualizing metal line resistance: four squares with sheet resistance Rs in series gives resistance as R = 4Rs.

Resistor design How to increase resistor resistance ? L W   How to increase resistor resistance ? Change L: make it longer Change W: make it narrower Change T: make it thinner Change ρ: choose material with higher resistivity

PVD films for solar cells 50 nm 2 µm 1 µm Poortmans: Thin film solar cells

CVD: Chemical Vapor Deposition gas phase convection diffusion through boundary layer surface processes (adsorption, film deposition, desorption) The whole wafer is covered by the deposited film.

Common CVD processes SiH4 (g) ==> Si (s) + 2 H2 (g) SiCl4 (g) + 2 H2 (g) + O2 (g) ==> SiO2 (s) + 4 HCl (g) 3 SiH2Cl2 (g) + 4 NH3 (g) ==> Si3N4 (s) + 6 H2 (g) + 6 HCl (g)

Thermal vs. CVD oxide thermal, 1000oC Applicable only on silicon. High temperature. silicon Deposition also on metals. Low temperature. silicon (PE)CVD 300-450oC

Plasma Enhanced CVD Deposition can be done at 300oC. Thermal CVD is usually 400-700oC (Thermal oxidation at 1000oC) Oxide: SiH4 (g) + N2O (g) ==> SiO2 (s) + N2 (g) + 2H2 (g) Nitride: 3 SiH2Cl2 (g) + 4 NH3 (g) ==> Si3N4 (s) + 6 H2 (g) + 6 HCl (g)

SiNx:H: thermal vs. plasma Thermal CVD at 900oC PECVD at 300oC Smith: J.Electrochem.Soc. 137 (1990), p. 614

Dielectric films SiO2 gate oxide in CMOS 1-50 nm SiO2 isolation oxide in CMOS 100-1000 nm SiO2 diffusion mask 500 nm SiO2 etch mask in MEMS 100-1000 nm Si3N4 oxidation mask 100 nm Si3N4 membrane in MEMS 50-200 nm Si3N4 capacitor dielectric 5-20 nm Al2O3 capacitor dielectric 1-20 nm HfO2 capacitor dielectric 1-20 nm SiNx passivation coating 500-1000 nm

Sample wafers !

Thin film patterns The whole wafer is covered by the deposited film. If you want patterns of films, you have to do lithography and etching. Lithography Etching Remove photoresist

Etching two-layer films <Si> <Si> <Si> Two separate layers: make upper pattern larger than bottom pattern! If two layers are perfectly aligned, they were made in the same litho & etch steps. Otherwise alignment error would be visible.

poly = CVD polysilicon =polycrystalline silicon SiH4 (g) ==> Si (s) + 2 H2 (g) Deposited by CVD at 625oC Usually deposited undoped Doping after deposition by diffusion/implantation Annealing typically 950oC, 1 h to active dopants Heavy doping ca. 500 µΩ-cm Grain size ca. 200-300 nm Annealing changes film stress (and grain size) Typical thickness 100 nm-2 µm

ALD: Atomic Layer Deposition Precursors introduced in pulses, with purging in-between

ALD: surface reactions

ALD films Al2O3 diffusion barrier 1-20 nm Al2O3 hard mask in etching 1-20 nm HfO2 capacitor dielectric 1-20 nm TiN electrode 50-100 nm TiN protective coating 50-100 nm TaN barrier layer 1-10 nm Pt catalyst 1-5 nm

Growth modes layer-by-layer island growth columnar growth

Step coverage in deposition H B Ratio of film thickness on sidewall to horizontal surfaces (100% = conformal coverage) Cote, D.R. et al: Low-temperature CVD processes and dielectrics, IBM J.Res.Dev. 39 (1995), p. 437

ALD step coverage Excellent conformality: deposition is a surface controlled reaction. Al2O3/TiO2 nanolaminate TiN barrier Franssila: Microfabrication

Electroplating Typical plated metals: -nickel (Ni) -copper (Cu) -gold (Au) Not applicable to: -aluminum (Al) -most refractory metals (W, Ti, ...)

Electroplated structures a) Seed layer sputtering and lithography b) Electroplating metal c) Resist stripping d) Seed layer removal Why use electroplating ? Metals like copper and gold do not have anisotropic plasma etch processes available  If you want vertical walls, electroplating is a solution.

Released plated metals

Stresses in thin films The substrate is in opposite stress state !

Origin of stress Extrinsic stresses: thermal expansion mismatch Intrinsic stresses: deposition process dependent low energy deposition  no energy for relaxation process high energy deposition  non-equilibrium, forced positions impurities, voids, grain boundaries

Cantilever bending Fang, W. & C.-Y. Lo, On the thermal expansion coefficients of thin films, Sensors &Actuators 84 (2000), p. 310

Stresses in bimetal cantilever

Generic thin film structure substrate thin film 1 thin film 2 surface interface 2 interface 1 Various interfacial processes take place during following process steps and during device operation ! thin film 1

Reactions in thin films Surface reaction: Titanium nitride formation 2Ti + N2  2 TiN <Si> Ti N2 heat Interface reaction: Titanium silicide formation Si + 2 Ti  TiSi2

Interfaces Stability of interface in subsequent processing and during use ?

Barriers and adhesion layers In order to stabilize the interfaces, additional films are introduced: -to improve adhesion, e.g. Ti/Pt, Cr/Au -to prevent interdiffusion, Si/TiW/Al, SiO2/TaNx/Cu; SiO2/SiNx/Cu -to prevent ion movement: glass/Al2O3/poly-Si -to protect from ambient: SiO2/SiNx

Multilevel metallization with Ti/TiN barriers SiO2 SiNx W Ti/TiN

Copper for IC metallization General: low variation low particle generation large process window Barrier: t < 10 nm thick ρ < 500 µΩ-cm Cl conc. < 2% unif. < 2% step coverage >90% rate > 3 nm/min Low-k: CMP compatible Tdepo < 400oC adhesion on etch stopper Copper seed t > 2 nm step coverage ~100% rate > 10 nm/min growth and adhesion on etch stopper Etch stopper: growth and adhesion on dielectric on barrier

Acoustic multilayers Glass wafer Al (300 nm) Mo (50 nm) ZnO (2300 nm) Au (200 nm) Ni (50 nm) SiO2 (1580 nm) W (1350 nm) TiW (30 nm) TiW (30 nm) Glass wafer

Film characterization needs -spatial resolution (image spot size) -depth resolution (surface vs. bulk properties) -elemental detection (constituents, impurities) -structural information (grain structure) -dimensional characterization (thickness) -mechanical properties (curvature, stress,…) -surface properties (roughness, reflectivity,…) -top view vs. cross sectional imaging -…

Sputtered TiN characterization

Thin films On this course, we are interested in applications of thin films in microfabrication Prof. Jari Koskinen is teaching Thin film technology (period IV): “Principles of vacuum technology, surface physics and surface-ion interactions and low pressure plasma. Thin film methods: Physical vapor deposition, chemical vapor deposition, and other plasma. Characterization methods for thin films to determine, structure, composition, and mechanical and optical properties.”