I 2 C FOR SENSORS IN THE DOM Nestor Institute Koutsoumpos Vasileios - Nestor Institute 1

I 2 C general Koutsoumpos Vasileios - Nestor Institute 2  Shorthand for an “Inter-integrated circuit” bus.  Developed by Philips Semiconductor for TV sets in the 1980’s.  The I 2 C bus will be used to read out sensors in the DOM.  I 2 C bus operates three speeds: – Slow (under 100 Kbps) – Fast (400 Kbps) – High-speed (3.4 Mbps) – I 2 C v.2.0  I 2 C bus can be up to 10 feet long (moderate speeds).  2-wire serial bus – Serial data (SDA) and Serial clock (SCL).  1 master communicates with many slaves.  A slave will be a sensor in the DOM.

Current FPGA Koutsoumpos Vasileios - Nestor Institute 3  For f/w development, we use the Xilinx Spartan 3E FPGA (module EFM01, by Cesys).  EFM01 has:  Xilinx Spartan 3E module.  I 2 C bus.  USB 2.0 interface  50 I/O pins  Unrestricted usable without USB connection.  The same f/w will be ported to the Virtex 5 FPGA.

Read out Koutsoumpos Vasileios - Nestor Institute 4  We have written VHDL code for the Xilinx Spartan 3E module.  3 modules, in which a master communicates with a specific slave.  To read out:  A tilt meter module,  A compass module and  A temperature module.  1 top clock module, with which we give the same clock to the masters because, we want to take data form each sensor at the same time.

Sensor data Koutsoumpos Vasileios - Nestor Institute 5  We keep the data from all the sensors in a buffer (FIFO) in the FPGA.  From this buffer (FIFO), another firmware task can send the data to the shore.  This buffer is an interface module to the rest of the FPGA.  Flag to signal read enable of the buffer.  Need to define interface.  Sensor read out can be scheduled to take data once (single shot) or continuously (burst mode) for several minutes.  For testing and debuging log files are produced.

So far… Koutsoumpos Vasileios - Nestor Institute 6  Code implementation is completed.  Our firmware implementation runs at 138 MHz  Evaluation of results in simulation - pending.

Next Step Koutsoumpos Vasileios - Nestor Institute 7  Connect and read out the actual sensors, compass, tilt meter.  Finalize the interface module to the other f/w in the FPGA (Virtex 5).  Evaluation of real time results.