Intro to PCI 2002 년 1 월 21 일 신 준 헌

Contents PCI bus features General PCI bus model PCI Device vs. Function Specifications

PCI bus feature PCI  Peripheral Component Interconnect PCI bus can be populated  Fast accesses to each other  System memory can be accessed with full native bus speed Burst transfer  All read and write transfers over the PCI bus  Bus master determines the length of the burst

FeatureDescription Processor independence Designed for the PCI bus are PCI-specific Support 80 PCI functions per PCI bus PCI bus supports ten electrical device, each device contain up to eight PCI function Support 256 PCI busses Specification provides support 256 PCI bus Low-powerA major design goal of the PCI specification Bursts can be performed all r/w 32-bit PCI bus => 132MBytes/sec 64-bit PCI bus => 264MBytes/sec Bus speed33MHz in revision 2.0 spec 66MHz in revision 2.1 spec 64-bit bus widthFull definition of a 64-bit extension Access timeAs fast as 60ns (at 33MHz) Concurrent bus operation Bridges support full bus concurrency with processor bus, PCI bus

FeatureDescription Bus master support Allows peer-to-peer PCI bus access Hidden bus arbitration Can take place while another bus master is performing a transfer on the PCI bus Low-pin countFunctional PCI target with 47 pins and initiator with 49 pins Transaction integrity check Parity checking in the address, command and data Three address spaces Memory, I/O and configuration address space Auto- Configuration Support automatic device detection and configuration by configuration registers Software transparency Software drivers utilize same command set and status definition Add-In cardsDefinition of PCI connectors and add-in cards in specification Add-In card sizeDefines three card size, long, short and variable-height short cards, in specification

General PCI bus model Host/PCI bridge : North bridge  Connect host processor bus to root PCI bus PCI-to-ISA bridge : South bridge  Connect PCI bus to ISA bus  Incorporates  Interrupt controller, IDE controller, USB Host controller, DMA controller PCI-to-PCI bridge Chipset support mort than one North bridge

PCI Device vs. Function Function is logical device

Specifications Document titleRevision PCI local bus specification2.2 PCI-to-PCI bridge specification1.1 PCI system design guide1.0 PCI BIOS specification2.1 PCI bus power management interface specification 1.1 PCI Hot-Plug specification1.0