نظام المحاضرات الالكترونينظام المحاضرات الالكتروني System buses.

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Presentation transcript:

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني System buses

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني System buses The CPU is connected to the rest of the system through system bus. Through system bus, data or information gets transferred between the CPU and the other component of the system. The system bus may have three components: Data Bus: Data bus is used to transfer the data between main memory and CPU. Address Bus: Address bus is used to access a particular memory location by putting the address of the memory location.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني System buses Control Bus: Control bus is used to provide the different control signal generated by CPU to different part of the system. As for example, memory read is a signal generated by CPU to indicate that a memory read operation has to be performed. Through control bus this signal is transferred to memory module to indicate the required operation.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني System buses

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني System buses There are three basic components of CPU: register bank, ALU and Control Unit. There are several data movements between these units and for that an internal CPU bus is used. Internal CPU bus is needed to transfer data between the various registers and the ALU, because the ALU in fact operates only on data in the internal CPU memory.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Organization of Memory Units

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Organization of Memory Units  A basic memory unit provides the ability to store and access a fixed number of bits.  Each bit within such a unit may be selected individually for reading and writing.  Memory units are usually distributed as bit slices.  If A chip can store 64K bits, each chip will be used to store one bit each from 64K different locations, rather than a complete byte from 8K different locations

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Bit Slice Memory Organizition

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Memory as a linear Array Consider a byte-addressable memory with N bytes of memory. Byte memory [N]; // Address ranges from 0 to (N-1) Let’s say for example that these notes were written on a computer with 384MB of memory. 384MB=384*2²⁰ bytes, since memory is byte addressable, N= 384* = 402,653,184 Also note that: 384 MB = ( )*2 20 =

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Memory Addressing  A memory address is an identifier for a memory location, at which a computer program or a hardware device can store data and later retrieve it.  It’s a binary number from a finite monotonically sequence that uniquely describes the memory itself.  In modern byte-addressable computers, each address identifies a single byte of storage

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Samples of Memory Addressing

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Addressing Strategies 1- Coordinate-Addressed: Memory is accessed by supplying a number (address) which is used directly to identify a particular physical storage location. Data is copied into or out the selected location. Coordinate-Addressed are typically constructed as a collection of individual units such as chips, each capable of storing a limited number of bits.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني 2- Content-Addressed: Also called Associative. It is accessed by supplying a data value for certain portions (fields) of a storage location, rather than the physical address of that location. The memory automatically identifies any locations that match the given data, and the contents of these locations may be accessed.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني Two registers are associated with the Content- Addressed Memory (CAM):  MASK  DATA  Each register has the size of one full word  Each word includes some comparison logic and one or more TAG bits.  Each set of tag bits forms a bit-slice register, with one bit for each word of the memory

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني A Content-Addressable Memory Includes a set of words, each consisting of a number of bits. Common for such a memory to have very large word sizes, often 100 bits or more.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Memory Addressing In addition to the address bus and data bus, semiconductor memories have read and write control signals and chip select signals. Depending on the type of memory, other signals may be required. Chip Select (CS) or Chip Enable (CE) is used as part of address decoding. All other inputs are ignored if the Chip Select is not active. Read Enable (RE) and Write Enable (WE) signals are sent from the CPU to memory to control data transfer to or from memory. Output Enable (OE) is active during a read operation, otherwise it is inactive. It connects the memory to the data bus.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Memory Expansion Memory can be expanded in either word size or word capacity or both. To expand word size: Notice that the data bus size is larger, but the number of address is the same.

نظام المحاضرات الالكترونينظام المحاضرات الالكتروني © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Memory Expansion To expand word capacity, you need to add an address line as shown in this example Notice that the data bus size does not change. What is the purpose of the inverter? Only one of the ICs is enabled at any time depending on the logic on the added address line.