CSNSM SPACIROC S. Ahmad, P. Barrillon, S. Blin, S. Dagoret, F. Dulucq, C. de La Taille IN2P3-OMEGA LAL Orsay, France Y. Kawasaki - RIKEN,Japan I. Hirokazu – JAXA, Japan

Overview SPACIROC - Spatial Photomultiplier Array Counting and Integrating ReadOut Chip  Readout chip for 64 channels MAPMT  Low-power & radiation hardened  Co-designed by LAL/JAXA/RIKEN JEM-EUSO : Extremely High Energy Cosmic Ray(EECR) observer onboard of International Space Station Observing extensive air shower created by the EECRs EUSO-BALLOON : A prototype (1 PDM) with electronics and mechanics as close as possible to the one of JEM- EUSO Project CNES + IRAP (Toulouse), APC and LAL supported by the whole JEM-EUSO collaboration Goal: Launch in 2014 Technological demonstrator (PDM + software) Study of the background Tests of the DAQ and the algorithms (trigger et switch) Detection of an atmospheric shower

JEM–EUSO – Front End ASIC 64 channels photon counting –Single photon counting 100% trigger efficiency: 1/3 pe –Double pulse resolution : 10 ns Charges to Time (Q-to-T) converters –Variable trigger pulse width –Pixels charge measurement: 2pC – 200pC Data acquisition & Readout to be done within 2.5 µs (GTU) –Readout Clock : 40MHz Radiation hardness Power budget : <1mW/channel

4 SPACIROC – Status SPACIROC1: Technology: AMS 0.35µm SiGe –Submitted in March 2010 –Chip arrival: Mid-July –Test: September –Dimensions : 4.6mm x 4.1mm (19 mm²) –Power supply: 0-3V –Naked Die: 1700 chips –Packaging : CQFP240 (proto) CQFP160 (Euso-balloon production) 4.1mm 4.6mm SPACIROC2: Technology: AMS 0.35µm SiGe –Submitted in November 2011 –Chip arrival: February 2012 –Dimensions : 4.6mm x 4.6mm (21 mm 2 ) –Power supply: 0-3V –Packaging : CQFP208 (proto)

5 SPACIROC – Slow Control Cell Slow control cell: 1 Scan DFF + triple Data latch Majority voter Bit error detection Non-destructive data readout Bigger layout : SEL protection,... 32µm 16µm 114µm 18µm Layout Bascule DFF Layout Slow Control Cell Spaciroc

SPACIROC – Design & Architecture

7 1)Photon Counting 64 channels (pixels) – Fast MHz 3 different triggers available  Trig_PA: output directly from preamplifier  Trig_FSU : Maroc3 unipolar fast shaper  Trig_VFS : new optimised fast triggering shaper 2)Q-to-T (based on KI02 ASIC – JAXA/RIKEN) 8 channels : each for 8-pixel sum preamplifier signals Input dynamic range: 16pC – 1600pC (MAPMT gain 10 6 ) 3)Digital Photon counting : 64 x 8-bit counter, 8 serialized outputs Q-to-T: 8 x 7-bit counter + 1 x 8-bit counter, 1 serialized output

Photon Counting - Architecture Input from MAPMT 64 anodes vth < 10ns Q SPACIROC2 R=10k buffer SPACIROC2 VFS Discri modified

Average Threshold = DAC (2.509V); RMS = 1.8 DAC (~2mV) SPACIROC1: 64 channels Scurves Average Threshold =93.7DAC ; RMS = 2.5 DAC LSB Average Threshold =170.9DAC ; RMS = 17.7 DAC LSB PA 50fC VFS 132fC FSU 55fC

SPACIROC1: PA Measurement – Ch32 Gain = 0.32mV/fC Min Input = 10fC 5*Noise = 3.7fC Pedestal = 2.529V  =1.1mV Double pulse separation : 36 ns

SPACIROC1: FSU Measurement – Ch32 Gain = 0.944mV/fC Min Input = 15fC 5*Noise = 10fC Pedestal = 1.03V  =1.99mV Double pulse separation : 30 ns

SPACIROC1: VFS Measurement – Ch32 Gain = 1.29mV/fC Min Input = 23fC 5*Noise = 4.35fC Double pulse separation : 15 ns

KI(8-Pixel-Sum) - Architecture ΔtΔt

SPACIROC1: Mapmt measurements Test setup: HVPS: K=1000V & Cockroft Walton MAPMT: Hamamatsu R11265-M64 MAPMT Gain: (1p.e=0.16pC) DC LED : λ=378nm Photon Counting KI Photon Counting pileup:30p.e KI range: pC

SPACIROC1 issues & bugs –Power consumption: Due to design bugs, unused component can’t be turned off. –In baseline mode(Trig_FSU), VFS shapers & Trig_PA discri are always ON! Non negligeable useless power dissipation. –PC: Noise problem: Noise polluting some inputs –PC: Double pulse separation: Off target for 10 ns. Probably unachievable. –PC : Trig_PA Expected signal & gain too low compared to simulations –Very sensitive to layout parasitic capacitances –PC: Trig_VFS: VFS has no turned OFF switch! Discri has very uneven behavior due to process disparity 15

Comparison SPACIROC1 Consumption –Trig_pa: 1.08mW/ch –Trig_fsu: 1.07mW/ch –Trig_vfs: 0.96mW/ch SPACIROC2 16 Pedestals –Pa: mean= 2.522V ;rms=1mV –Fsu: mean= 1.038V ;rms=1mV –Vfs: mean= 1.037V;rms=1mV Consumption –Trig_pa: 0.68mW/ch –Trig_fsu: 0.83mW/ch –Trig_vfs: 0.72mW/ch Pedestals –Pa: mean= 2.5V ;rms=<1mV –Pa_buff: mean= 1.72V rms=<1mV –Fsu: mean=1.03V ;rms=1mV –Vfs: mean=1.06V ;rms=1mV FSU noise improved

Conclusion 17 SPACIROC: Good behaviour for first prototype Good baseline for Photon Counting SC cells & Digital modules working as expected 4 COB ASICs integration (UFFO-EC board) Will be used for EUSO-Balloon (CQFP160) SPACIROC: Good behaviour for first prototype Good baseline for Photon Counting SC cells & Digital modules working as expected 4 COB ASICs integration (UFFO-EC board) Will be used for EUSO-Balloon (CQFP160) SPACIROC2: Eliminate all power consumption problems Bringing down power consumption by 30% Improve double pulse separation Replace Trig_VFS discri Improve Trig_PA & KI performances SPACIROC2: Eliminate all power consumption problems Bringing down power consumption by 30% Improve double pulse separation Replace Trig_VFS discri Improve Trig_PA & KI performances UFFO – EC Photon Counting: Trig FSU (Baseline): Double pulse separation : 30 ns Gain = 1mV/fC Min input = 30 fC Trig_PA: Double pulse separation : 36 ns Gain = 0.32mV/fC Min input = 30 fC Trig_VFS: Double pulse separation : 15 ns Gain = 1.3mV/fC Min input = 60 fC KI: 8-pixel-sum: Input test: 1.6 – 160 pC Saturation starts at 40p

18

Noise measurements SPACIROC1 SPACIROC2 19 PA:218µV PA:239µV PA after buffer: 280µV VFS:1.3mVVFS:1.9mV FSU:1.47mVFSU:1.27mV

20 SPACIROC – Digital Overview 20 8 x 8-bit counter 8 x 7-bit counter + 1 x 8-bit counter DataOut 8 x digital module for PhotonCounting 1 x digital module for KI 9 x Serialized Data Out line Power Consumption: Photon Counting : mW/ch – mw/ch KI: mW/ch – mW/ch

21 SPACIROC – Slow Control Cell Slow control cell: 1 Scan DFF + triple Data latch Majority voter Bit error detection Non-destructive data readout Bigger layout : SEL protection,... 32µm 16µm 114µm 18µm Layout Bascule DFF Layout Slow Control Cell Spaciroc

Photon Counting – Simulations Triggers for 80 fC input charge (1/2 pe for PMT gain =10 6 ) Trig_FSU Vth=1.2v Δt<10ns Trig_PA Vth=2.35v Δt<5ns Trig_VFS Vth=1.2v Δt<5ns

Photon Counting – Simulations Triggers for 160 fC input charge (1 pe for PMT gain =106) Trig_FSU Vth=1.2v Δt<10ns Trig_PA Vth=2.35v Δt<15ns Trig_VFS Vth=1.2v Δt<5ns

KI 8-Pixel-Sum – Simulations 2.4pC 11pC 52pC 240pC Input : 2.4pC – 240pC