Digital Logic & Design Dr. Waseem Ikram Lecture 11.

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Presentation transcript:

Digital Logic & Design Dr. Waseem Ikram Lecture 11

Recap Karnaugh Maps Mapping Standard SOP expressions Mapping Non-Standard SOP expressions Simplification of K-maps Don’t care states

Mapping a Standard POS expression Selecting n-variable K-map 0 marked in cell for each maxterm Remaining cells marked with 1

Mapping of Standard POS expression POS expression AB\C A\BC

Simplification of POS expressions using K-map Mapping of expression Forming of Groups of 0s Each group represents sum term 3-variable K-map 1 cell group yields a 3 variable sum term 2 cell group yields a 2 variable sum term 4 cell group yields a 1 variable sum term 8 cell group yields a value of 0 for function

Simplification of POS expressions using K-map3 4-variable K-map 1 cell group yields a 4 variable sum term 2 cell group yields a 3 variable sum term 4 cell group yields a 2 variable sum term 8 cell group yields a 1 variable sum term 16 cell group yields a value of 0 for function

Simplification of POS expressions using K-map AB\C A\BC

Simplification of POS expressions using K-map AB\C A\BC

Simplification of POS expressions using K-map AB\CD

Simplification of POS expressions using K-map AB\CD

Simplification of POS expressions using K-map AB\CD

Conversion between SOP & POS using K-map Groups of 1s represents SOP expression Groups of 0s represents POS expression

Conversion between SOP & POS using K-map AB\CD

5-Variable K-map Represented as two, 4 variable K-map

5-Varaible K-map BC\DE

5-Varaible K-map BC\DE

Simplification of a 5-Variable K-map 5 variable K-map mapping 5 variable K-map grouping 5 variable K-map simplification

5-Varaible K-map simplification BC\DE

5-Varaible K-map simplification BC\DE

Functions having multiple outputs Ckt receives a BCD number input Displays decimal number 0 to 9 on a single digit 7-segment display Ckt receives two 2-bit numbers A and B Sets one of three outputs to >, =, or <

7-Segment Display

InputsOutput ABCDa InputsOutput ABCDa X 1011X 1100X 1101X 1110X 1111X Function Table for Segment ‘a’

InputsOutput ABCDb InputsOutput ABCDb X 1011X 1100X 1101X 1110X 1111X Function Table for Segment ‘b’

InputsOutput ABCDc InputsOutput ABCDc X 1011X 1100X 1101X 1110X 1111X Function Table for Segment ‘c’

InputsOutput ABCDd InputsOutput ABCDd X 1011X 1100X 1101X 1110X 1111X Function Table for Segment ‘d’

InputsOutput ABCDe InputsOutput ABCDe X 1011X 1100X 1101X 1110X 1111X Function Table for Segment ‘e’

InputsOutput ABCDf InputsOutput ABCDf X 1011X 1100X 1101X 1110X 1111X Function Table for Segment ‘f’

InputsOutput ABCDg InputsOutput ABCDg X 1011X 1100X 1101X 1110X 1111X Function Table for Segment ‘g’

Karnaugh Map for Segment ‘a’ AB\CD xxxx 1011xx

Karnaugh Map for Segment ‘b’ AB\CD xxxx 1011xx

Karnaugh Map for Segment ‘c’ AB\CD xxxx 1011xx

Karnaugh Map for Segment ‘d’ AB\CD xxxx 1011xx

Karnaugh Map for Segment ‘e’ AB\CD xxxx 1010xx

Karnaugh Map for Segment ‘f’ AB\CD xxxx 1011xx

Karnaugh Map for Segment ‘g’ AB\CD xxxx 1011xx

7-Segment Circuit