Antenna Project in Cameron clean room Wafer preparation, conductor deposition, photolithography.

Slides:



Advertisements
Similar presentations
FABRICATION PROCESSES
Advertisements

I have seen this happen !. You have exceeded your storage allocation.
Process Flow : Overhead and Cross Section Views ( Diagrams courtesy of Mr. Bryant Colwill ) Grey=Si, Blue=Silicon Dioxide, Red=Photoresist, Purple= Phosphorus.
CMOS Fabrication EMT 251.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #6.
Dilbert.
Photolithography Photolithography is the transfer of patterns, circuits, device structures, etc. to a substrate or wafer using light and a mask.
Introduction to CMOS VLSI Design Lecture 0: Introduction
Top Side Conductor vacuum deposition Aluminum sputter deposit in Argon plasma CVC 601-sputter deposition tool.
Lecture #51 Lecture #5 – VLSI Design Review zPhotolithography zPatterning Silicon zProcess steps used are: yStarts with Si wafer yThermal oxidation yPhotoresist.
Sample Devices for NAIL Thermal Imaging and Nanowire Projects Design and Fabrication Mead Mišić Selim Ünlü.
ECE 424 – Introduction to VLSI Design Emre Yengel Department of Electrical and Communication Engineering Fall 2012.
Thin Film Deposition Prof. Dr. Ir. Djoko Hartanto MSc
Device Fabrication Example
Introduction Integrated circuits: many transistors on one chip.
ES 176/276 – Section # 2 – 09/19/2011 Brief Overview from Section #1 MEMS = MicroElectroMechanical Systems Micron-scale devices which transduce an environmental.
Solar Cell conductive grid and back contact
Lecture 4 Photolithography.
Z. Feng VLSI Design 1.1 VLSI Design MOSFET Zhuo Feng.
CS/EE 6710 CMOS Processing. N-type Transistor + - i electrons Vds +Vgs S G D.
Microelectronic Device Fabrication
Dilbert. Dilbert Wal-Mart Apple Computer Started about the same time as Microsoft Was founded by Steve Jobs and Steve Wosniak in a garage.
Fabrication of Active Matrix (STEM) Detectors
Materials Conductive materials – valence band overlaps the conduction band Conductive materials – valence band overlaps the conduction band Non conductive.
Dilbert. Next steps in the antenna fabrication process Create a dielectric surface. The antenna must sit on a dielectric or insulating surface,
1. A clean single crystal silicon (Si) wafer which is doped n-type (ColumnV elements of the periodic table). MOS devices are typically fabricated on a,
I have seen this happen !. You have exceeded your storage allocation.
SEMINAR ON IC FABRICATION MD.ASLAM ADM NO:05-125,ETC/2008.
Introduction to CMOS VLSI Design CMOS Fabrication and Layout Harris, 2004 Updated by Li Chen, 2010.
Elemental silicon is melted and grown into a single crystal ingot Single crystal ingot being grown Completed silicon ingot.
DILBERT. Did research and learned about several communication devices – cellular phones, Bluetooth/Wi-Fi, and RFID Did research and learned.
Top Down Manufacturing
Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 3, slide 1 Introduction to Electronic Circuit Design.
Budapest University of Technology and Economics Department of Electron Devices Solution of the 1 st mid-term test 20 October 2009.
#4 (Oct. 22) Photolithgraphy -What is photolithgraphy? -Thin-film patterning using phtolithgraphy -Applications of photolithgraphy -Trends in minimum pattern.
IC Processing. Initial Steps: Forming an active region Si 3 N 4 is etched away using an F-plasma: Si3dN4 + 12F → 3SiF 4 + 2N 2 Or removed in hot.
ISAT 436 Micro-/Nanofabrication and Applications Photolithography David J. Lawrence Spring 2004.
CORPORATE INSTITUTE OF SCIENCE & TECHNOLOGY, BHOPAL DEPARTMENT OF ELECTRONICS & COMMUNICATIONS NMOS FABRICATION PROCESS - PROF. RAKESH K. JHA.
Substitute beer and pizza?. Basic Silicon Solar Cell as fabricated in Cameron With Schematic.
©2008 R. Gupta, UCSD COSMOS Summer 2008 Chips and Chip Making Rajesh K. Gupta Computer Science and Engineering University of California, San Diego.
Solar Cells need a top side conductor to collect the current generated They also need a conductive film on the backside.
Electronics 1. The Bohr atom The nucleus is positively charged and has the protons and neutrons. The atomic number is the number of protons and determines.
LITHOGRAPHY IN THE TOP-DOWN PROCESS - BASICS
CMOS VLSI Fabrication.
CMOS FABRICATION.
Definition History Fabrication process Advantages Disadvantages Applications.
CMOS Fabrication EMT 251.
Solar Cells need a top side conductor to collect the current generated They also need a conductive film on the backside.
IC Manufactured Done by: Engineer Ahmad Haitham.
Wisconsin Center for Applied Microelectronics
Photolithography Photolithography is the transfer of patterns, circuits, device structures, etc. to a substrate or wafer using light and a mask.
DILBERT.
Dilbert.
Basic Planar Processes
CMOS Fabrication CMOS transistors are fabricated on silicon wafer
Prof. Jang-Ung Park (박장웅)
Lithography.
積體電路元件與製程 半導體物理 半導體元件 PN junction CMOS 製程.
VLSI System Design LEC3.1 CMOS FABRICATION REVIEW
Silicon Wafer cm (5’’- 8’’) mm
DILBERT.
Dilbert.
Materials Conductive materials – valence band overlaps the conduction band Non conductive materials – valence band is separated from conduction.
Dilbert.
Materials Conductive materials – valence band overlaps the conduction band Non conductive materials – valence band is separated from conduction.
Materials Conductive materials – valence band overlaps the conduction band Non conductive materials – valence band is separated from conduction.
CSE 87 Fall 2007 Chips and Chip Making
Presentation transcript:

Antenna Project in Cameron clean room Wafer preparation, conductor deposition, photolithography

Dilbert

The starting material for the antenna project is a silicon wafer It is also the starting material for most microelectronic devices

Silicon is a group 4 element, meaning it has 4 electrons in its outer electron band Group 4

Why is silicon an excellent microelectronics material? 1.It is very abundant 2.It can be grown into a single orientation crystal 3.It can be made electrically active easily by “doping” with group 3 and group 5 elements 4.It can be made to conduct electrons with a small applied potential 5.It has a naturally forming oxide that acts as an insulating and diffusion barrier

Two dimensional schematic of three dimensional crystal

Group 3 Elements

P type doping – Positive, electron short, also called a hole

Group 5 elements

N-type doping – N is negative, electron rich

Combing n-type silicon and p- type silicon gives a pn junction The whole microelectronics revolution can be traced to this fundamental characteristic of silicon – a semiconductor material

Silicon is the most common semiconducting material for today’s microelectronics Many other semiconducting materials like GaAS, and GaN are used for specific applications

Creating an antenna on the silicon wafer

Starting material is a 100mm (4 inch) wafer of silicon - shown in an edge view

Wafers are chemically cleaned first

Silicon Dioxide (SiO 2 ) is grown on the silicon creating a dielectric or insulating layer The antenna must sit on an insulating layer

High temperature tube furnace for the formation of silicon dioxide (SiO 2 )

Once the insulating layer is formed, a conductor needs to be chosen

Conductivity of metals 1.Silver Expensive, used for solar cells 2.Copper Moderate cost, used in electrical wiring, antennas 3.Gold Very expensive but very useful in that it will not oxidized. Used in most high quality connections 4.Aluminum Low cost, easy to use, used for most microelectronics devices

For this antenna project Copper will be used

A copper metal is vacuum deposited on to the wafer

Conductor vacuum deposition tools in the ECE Microelectronics Clean Room CVC 601-sputter deposition Varian 3125 e-beam depositionCHA Mark 50 e-beam deposition Cooke-thermal deposition

Photolithography Photolithography is the transfer of patterns, circuits, device structures, etc. to a substrate or wafer using light and a mask or stencil to stop the light. Photolithography was used extensively in the progression of microelectronics. Today, because of the sizes involved in current computer microprocessor devices, other methods like direct patterning using electron beams are used. Photolithography is still used for dimensions down to about 0.5um. The wavelength of UV light is um.

UV light sensitive material called photoresist is spin coated on to the conductor side of the wafer

Wafers are spin coated with Shipley 1813 UV sensitive photoresist spin coating produces a uniform coating A vacuum chuck holds the wafer Spin speed is set here Light sensitive material is stored in amber dropper bottles – Use 1813

The antenna design, arrayed on a transparency sheet, is placed on top of the wafer. This transparency is called a photo mask. Production photo masks would be made on glass plates with high precision patterns.

The antenna pattern, arrayed and printed on a transparency paper, is used as a photomask The array of antenna will be cut to just larger than the wafer

Ultraviolet light is projected down on to the photoresist coated wafer

HTG mask aligner and UV light source The UV light source is a mercury vapor lamp at 436nm wavelength Exposure time set on timer Wafer is held by vacuum, mask is placed on top and brought into contact with wafer Clear glass plates are used to make sure the transparency lays flat to the wafer UV light with filter surrounding it

The wafer is developed, leaving photoresist where no UV light has penetrated the mask

Solitec automatic developer Vacuum switch Start switch

Conductors are etched using chemicals specific to the metal Gold, silver, nickel, and copper etch Chrome etch Aluminum etch

After etching, the antenna pattern, in the conductor of choice, will be left on the wafer

Homework Complete dimension drawing and printing of transparency mask – submit dimension drawing Find PowerPoint programs on Mosaic Begin learning how to use it Your project report will be done on PowerPoint Photos of your team working in the clean room are required for the PowerPoint report