80C51 Block Diagram 1. 80C51 Memory 3 8051 Memory The data width is 8 bits Registers are 8 bits Addresses are 8 bits – i.e. addresses for only 256.

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Presentation transcript:

80C51 Block Diagram 1

80C51 Memory 3

8051 Memory The data width is 8 bits Registers are 8 bits Addresses are 8 bits – i.e. addresses for only 256 bytes! – PC is 16 bits (up to 64K program memory) – DPTR is 16 bits (for external data - up to 64K) C types – char - 8 bits<-- use this if at all possible! – short - 16 bits – int - 16 bits – long -32 bits – float -32 bits C standard signed/unsigned 4

Accessing External Memory 5

Program Memory Program and Data memory are separate Can be internal and/or external – 20K internal flash for the Atmel controller Read-only – Instructions – Constant data char code table[5] = {‘1’,‘2’,‘3’,‘4’,‘5’} ; – Compiler uses instructions for moving “immediate” data 6

External Data Memory External Data - xdata – Resides off-chip – Accessed using the DPTR and MOVX instruction – We will not use xdata – We will use the SMALL memory model all data is on-chip limited to only ~128 bytes of data! 7

Internal Data Memory Internal data memory contains all the processor state – Lower 128 bytes: registers, general data – Upper 128 bytes: indirectly addressed: 128 bytes, used for the stack (small!) directly addressed: 128 bytes for “special” functions 8

Lower 128 bytes Register banks, bit addressable data, general data – you can address any register! – let the C compiler deal with details (for now) 9

Data Memory Specifiers “data” - first 128 bytes, directly addressed – the default “idata” -all 256 bytes, indirectly addressed (slower) “bdata” -bit-addressable memory – 16 bytes from addresses 0x20 to 0x2F – 128 bit variables max bit flag1, flag2; flag1 = (a == b); – can access as bytes or bits char bdata flags; sbit flag0 = flags ^ 0; /* use sbit to “overlay” */ sbit flag7 = flags ^ 7; /* ^ specifies bit */ flags = 0; /* Clear all flags */ flag7 = 1;/* Set one flag */ 10

Ports Port 0 - external memory access – low address byte/data Port 2 - external memory access – high address byte Port 1 - general purpose I/O – pins 0, 1 for timer/counter 2 Port 3 - Special features – 0 - RxD: serial input – 1 - TxD: serial output – 2 - INT0: external interrupt – 3 - INT1: external interrupt – 4 - T0: timer/counter 0 external input – 5 - T1: timer/counter 1 external input – 6 - WR: external data memory write strobe – 7 - RD: external data memory read strobe 11

Ports 12

Ports Port 0 - true bi-directional Port have internal pullups that will source current Output pins: – Just write 0/1 to the bit/byte Input pins: – Output latch must have a 1 (reset state) Turns off the pulldown pullup must be pulled down by external driver – Just read the bit/byte 13

Program Status Word Register set select Status bits 14

Instruction Timing One “machine cycle” = 6 states (S1 - S6) One state = 2 clock cycles – One “machine cycle” = 12 clock cycles Instructions take cycles – e.g. 1 cycle instructions: ADD, MOV, SETB, NOP – e.g. 2 cycle instructions: JMP, JZ – 4 cycle instructions: MUL, DIV 15

Timers Base 8051 has 2 timers – we have 3 in the Atmel 89C55 Timer mode – Increments every machine cycle (12 clock cycles) Counter mode – Increments when T0/T1 go from (external signal) Access timer value directly Timer can cause an interrupt Timer 1 can be used to provide programmable baud rate for serial communications Timer/Counter operation – Mode control register (TMOD) – Control register (TCON) 16

Timer/Counter Control Register (TCON) TR - enable timer/counter TF - overflow flag: can cause interrupt IE/IT - external interrupts and type control – not related to the timer/counter 17

Interrupts Allow parallel tasking – Interrupt routine runs in “background” Allow fast, low-overhead interaction with environment – Don’t have to poll – Immediate reaction An automatic function call – Easy to program 8051 Interrupts – Serial port - wake up when data arrives/data has left – Timer 0 overflow – Timer 1 overflow – External interrupt 0 – External interrupt 1 18