Possible LLRF Configuration in ILC Sigit Basuki Wibowo LLRF Workshop, Shanghai - Nov 5, 2015.

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Presentation transcript:

Possible LLRF Configuration in ILC Sigit Basuki Wibowo LLRF Workshop, Shanghai - Nov 5, 2015

Outline  LLRF configuration in ILC - TDR  Status of Superconducting Test Facility (STF) in KEK  IF Mixture  Direct Sampling  Optical Communication Test Bench LLRF Workshop, Shanghai – Nov 5, 2015

 LLRF front-end controller (slave) calculate vector sum from the related cavities and send to central LLRF controller.  Central LLRF controller (master) calculate vector sum from all LLRF front- end controller. Feedback control is also conducted in this controller.  Large number of ADC.  Large data between front-end and master controller. LLRF Configuration in ILC - TDR LLRF Workshop, Shanghai – Nov 5, 2015

STF-2 Project KEK STF (Superconducting Test Facility) STF is built for ILC R&D Facility:  One 10-MW MBK drives 12 SC cavities.  Cavity conditioning (October – December 2015). One by one cavity is operated.  Total 12 of cavities will be operated simultaneously.  RF operation will be started on May  Beam operation is planned from the autumn of  1 FPGA board is for normal feedback operation.  2 FPGA boards are for monitoring (IF Mixture and Direct Sampling).  2 FPGA boards are for optical communication test stand. LLRF Workshop, Shanghai – Nov 5, 2015

Outline  LLRF configuration in ILC - TDR  Superconducting Test Facility (STF) KEK Status  IF Mixture  Direct Sampling  Optical Communication Test Bench LLRF Workshop, Shanghai – Nov 5, 2015

Digital LLRF Board in STF IF Mixture Board Features (Feedback & IF Mix):  4 ADC LTC2208, 16 bits, 130 Msps(Max.)  4 DAC AD9783, 16 bits, 500 Msps(Max.)  FPGA, Virtex 5 FX, Power PC with Linux. Direct Sampling Board Features (Direct Sampling):  2 ADC AD5474, 14 bits, 400 Msps (Max.)  FPGA, Virtex 5 FX, Power PC with Linux.

Down Conversion Process Conventional IF-Mixture  In conventional, each IF signal is connected to one ADC.  In IF mixture, more than one IFs is connected to one ADC through combiner. LLRF Workshop, Shanghai – Nov 5, 2015

IF Mixture (4 IFs) IF frequency:  IF = 4.5 MHz (81.25 MHz / 18 * 1)  IF1  IF = 13.5 MHz (81.25 MHz / 18 * 3)  IF3  IF = 22.5 MHz (81.25 MHz / 18 * 5)  IF5  IF = 31.5 MHz (81.25 MHz / 18 * 7)  IF7 IF1 IF3 IF5 IF7 Combined Signal goes to one ADC Specific I and Q components can be obtained : Combined Signal :

IF Mixture Result  IF mixture is operated to monitor forward, backward, and cavity field.  Cavity field = 31.5MV/m. 1 time step ≈ μs LLRF Workshop, Shanghai – Nov 5, 2015

Flattop Comparison  Waveform of IF mixture is consistent with that of normal operation.  IF mixture works as expected with very small different amplitude stability o rms 1 time step ≈ μs %rms %rms 1 time step ≈ μs LLRF Workshop, Shanghai – Nov 5, 2015

Outline  LLRF configuration in ILC - TDR  Superconducting Test Facility (STF) KEK Status  IF Mixture  Direct Sampling  Optical Communication Test Bench LLRF Workshop, Shanghai – Nov 5, 2015

Direct Sampling Method  The relation of f clock, f RF and I,Q components:  Under-sampling procedure for Direct Sampling: NoL Data Cycle N RF Period clock [MHz] f RF = 1300 MHz Sampling period = (24/5) * (1/1300 MHz) RF period = 1/1300 MHz Cavity ADC clock RF

Direct Sampling Result  Direct sampling is operated to monitor backward and cavity field.  Cavity field = 31.5MV/m. 1 time step ≈ μs LLRF Workshop, Shanghai – Nov 5, 2015

Flattop Comparison  The waveform of direct sampling is consistent with that of conventional.  There is significantly difference between conventional and direct sampling result which is needed to be investigated.  The different clock frequencies are going to be investigated %rms %rms 1 time step ≈ μs o rms o rms 1 time step ≈ μs LLRF Workshop, Shanghai – Nov 5, 2015

Outline  LLRF configuration in ILC - TDR  Superconducting Test Facility (STF) KEK Status  IF Mixture  Direct Sampling  Optical Communication Test Bench LLRF Workshop, Shanghai – Nov 5, 2015

Optical Communication Test Bench in STF, KEK. LLRF Workshop, Shanghai – Nov 5, 2015 DIV ADC VS FB/ FF O/E ADC VS DAC 0 90 ADC E/O ADC VS CLK DIV CLK IQ MOD STF2-LLRF (Master Unit) STF2-LLRF (Slave Unit) DIV = Divider ADC = Analog to Digital Converter DAC = Digital to Analog Converter VS = Vector Sum CLK = Clock E/O = Electrical to Optical Converter O/E = Optical to Electrical Converter FB/FF = Feedback / Feedforward IQ MOD = IQ Modulator

Cont. Optical Communication Test bench Features:  Zyncq-7000(XC7Z045)  14ch ADCs (AD9650, 16 bit)  2ch DACs (AD9783, 16 bit)  Spartan6(XC6SLX)  RJ-45 connector  2ch SFP connectors Optical communication among two boards are evaluated at test bench. MTCA.4 Standard Board LLRF Workshop, Shanghai – Nov 5, 2015

 ADC1: Serial transmission (Data output)  ADC2: Vector Sum (VS) 1 from master board  ADC3: VS1 result from SPF1  ADC4: VS1 result from SPF2  Time difference between ADC2 and ADC4 is 87 clock. 1/160 MHz * 87 = ns (The delay is caused mainly by P/S and S/P processes). This is the delay from slave to master board. Optical Communication Result LLRF Workshop, Shanghai – Nov 5, 2015 Delay

Summary  IF mixture, direct sampling, and optical communication test bench are demonstrated in STF, KEK.  IF mixture technique significantly reduces the required number of ADC.  Direct sampling can eliminate down converter.  Master and front-end controller communication delay must be compensated in order to get all controller synchronized. LLRF Workshop, Shanghai – Nov 5, 2015

Thank you for your attention