Lecture – 8 Interrupt 1

Outline Introduction Handling interrupt Interrupt sources Switching interrupt Peripheral interrupts Using two interrupts Conclusions 2

Interrupts Interrupts are the most used I/O technique for many systems. One problem exists with interrupts the are difficult to troubleshoot. The ISR is the function called by an interrupt. Each interrupting source has three control bits, IF (interrupt flag), IE (interrupt enable), and IP (interrupt priority). The IF flag is set only if an interrupt takes effect and cleared by the program. 3

Handling interrupts (1) The mechanism is very similar to CALL: 1)the present instruction completes. 2)PC (the address of the next instruction) is saved to the hardware stack 3)ISR is called at a fixed (by PlC architecture) address. 4)ISR operates as a subroutine (MUST not corrupt any registers/flags/bank settings/W), return (RETFIE) on completion. 4

Handling interrupts (2) ISR starts at the specific address. PC of the interrupted program is saved by hardware in a hardware stack. STATUS register and any other registers used by ISR are to be saved by the programmer if necessary. ISR should (1) polls status bits of valid interrupt sources; (2) serve requested; (3) clear their request bits. Restore registers and RETIF (programmer). 5

Interrupt sources Direct pin at PORT B (interrupt request) Change of signal at most pins of port B (interrupt on change) Generated by built-in peripherals (e.g., timers on overflow etc) Generated by internal watchdog timer - could be used to recover after a hardware malfunction. Generated when the supply voltage drops below a preset level, or just recover from a power loss. Interrupts can be disabled in general, or any specific interrupt can be disabled. 6

Why interrupt control is required How it is possible to handle more than one interrupt? What will happen if two interrupts occur at the same time? What will happen if an interrupt occurs while the other one is being served ? How to protect a critical code from being intrrupted (e.g. injecting a drug to a patient)? BCF INTCON, GIE critical code BSF INTCON, GIE 7

Interrupt control register Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON ). 8 Enable bitsFlag bits GIE - generalN/A PEIE- peripheral interruptsN/A TMR0IE - timer 0TMR0IF - timer 0 INT0IE - Interrupt request (RB0)INT0IF - interrupt request (RB0) RABIE - interrupt on change port BRABIF - interrupt on change port B

Switching interrupts General IE (GIE) - ensures that the ISR is not interrupted. IE flags - allow to enable particular interrupts ONLY. IF flags : indicate what interrupt actually happened. 9

Example What event has happened? GIEPEIET0IEINTERBIET0IFINTFRBIF

Example What event has happened? GIEPEIET0IEINTERBIET0IFINTFRBIF

Example What event has happened? GIEPEIET0IEINTERBIET0IFINTFRBIF

ISR programming necessities Initialisation: enable required interrupt, set GIE. ISR: Clear the IF associated (if not, the same interrupt will occur straight on RETFIE). ISR: Return using RETFIE. 13

Peripheral interrupts Peripheral interrupts enable register (PIE1) Peripheral interrupts request register (PIR1) EE-EEPROM, A/D converter, EUSART receive buffer, comparator C2, comparator C1, oscillator fail, EUSART transmit buffer, timer 1 overflow. 14

Example PIE1 PIR1 What event has happened? EEIEADIERCIEC2IEC1IEOSFIETXIETMR1IE EEIFADIFRCIFC2IFC1IFOSFIFTXIFTMR1IF

16 Example PIE1 PIR1 What event has happened? EEIEADIERCIEC2IEC1IEOSFIETXIETMR1IE EEIFADIFRCIFC2IFC1IFOSFIFTXIFTMR1IF

Using two interrupts E.g., on change and RC(receive). Initialization of both required BSF INTCON, RBIE BSF PIE1, RCIE BSF INTCON, PEIE BSF INTCON, GIE 17

Summary Interrupts allow putting away some background activities for something more important. Microcontrollers deal with interrupts from free running peripherals and external stimuli. They need to be enabled using lE flags, and the interrupt source can be determined using the IF flags. The ISR is placed at a fixed address. It must not to change anything except its dedicated variables. Interrupts can be prioritised if more than one is enabled. 18