Digital Logic & Design Dr. Waseem Ikram Lecture No. 26.

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Presentation transcript:

Digital Logic & Design Dr. Waseem Ikram Lecture No. 26

J-K flip-flop circuit with potential timing problem

Timing diagram of J-K flip-flop circuit with potential timing problem

Flip-flop circuit with potential timing problem due to Clock

Timing diagram of J-K flip-flop circuit with Clock Skew

J-K flip-flop circuit with potential race condition

Timing Diagram showing glitches due to race conditions

Timing Diagram of negative-edge triggered flip-flop avoiding glitches

3-bit Asynchronous Up-Counter

Timing Diagram of a 3-bit Asynchronous Up-Counter

InputOutput Clock Pulses F2F2 F1F1 F0F Output State of a 3-bit Asynchronous Up-Counter

Timing Diagram of a 3-bit Asynchronous with propagation

Timing Diagram of a 3-bit Asynchronous with high frequency clock

InputOutput Clock Pulses F2F2 F1F1 F0F Output of a 3-bit Asynchronous Up-Counter with high frequency clock

Mod-6 Counter

Timing diagram of a Mod-6 Counter

Asynchronous Decade Counter

Timing diagram of a Decode Counter

Internal circuit diagram of the 74LS93A Counter

74LS93A connected as MOD-16 Counter

74LS93A connected as Decade Counter

74LS93A Connected as a frequency divider (divide by 50)

3-bit Asynchronous Down- Counter

Timing diagram of a 3-bit Asynchronous Down-Counter

2-bit Synchronous Counter

Timing diagram of a 2-bit Synchronous Counter

Internal circuit diagram of the 74LS93A Counter

Recap Asynchronous Inputs Master-Slave flip-flop Operating Conditions Multi-vibrators Non-retriggerable Retriggerable

Multivibrators 555 Mono-Astable Multi-vibrator

Timing Problems in flip-flops Timing Problems (fig 1) Clock Skew (fig 2) Race Conditions (fig 3)

Asynchronous Counters Asynchronous Counters (fig 4) Propagation delay (fig 5) Propagation Delay at high frequency (fig 6) Mod-n Counters (fig 7) Decade Counter (fig 8) Integrated Circuit 74LS93A counter (fig 9) MOD-16 and Decade Counters (fig 10) MOD-50 Counter (fig 11) Down Counters (fig 12)

Synchronous Counters Synchronous Counter (fig 13) 3-bit counter (fig 14) 4-bit counter (fig 15) Synchronous Decade Counter (fig 16 tab 3)