Analog Integrated Circuits Lecture 1: Introduction and MOS Physics ELC 601 – Fall 2013 Dr. Ahmed Nader Dr. Mohamed M. Aboudina anader@ieee.org maboudina@gmail.com Department of Electronics and Communications Engineering Faculty of Engineering – Cairo University

Syllabus Week Lecture/Studio Topic Chapter 1 MOS Physics + Short Channel Effects 2 + 16 2 Single Stage Amplifiers + Frequency Response 3 + 6 3 Differential Amplifiers 4 Current Sources/Mirrors 5 Operational Amplifier Design 9 6 10 7 Text book: Design of Analog CMOS Integrated Circuits by Behzad Razavi Website: http://scholar.cu.edu.eg/anader/ Email: anader@ieee.org Office hours: Sunday 4:00 – 5:00 pm Monday 4:00 – 5:00 pm 4/28/2017 © Ahmed Nader, 2013

Analog Signal Processing Vs. Digital Signal Processing IC Fabrication Contents Analog Signal Processing Vs. Digital Signal Processing IC Fabrication Passives MOS: Device Physics MOS Structure and Threshold Voltage MOS I-V Characteristics MOS Non-idealities (Channel length modulation, Body effect) Subthreshold Conduction MOS Intrinsic capacitance and small-signal model Velocity Saturation 4/28/2017 © Ahmed Nader, 2013

Digital Signal Processing 4/28/2017 © Ahmed Nader, 2013

Analog Signal Processing 4/28/2017 © Ahmed Nader, 2013

Analog Signal Processing 4/28/2017 © Ahmed Nader, 2013

Data Converters 4/28/2017 © Ahmed Nader, 2013

4/28/2017 © Ahmed Nader, 2013

Integrated Circuits 4/28/2017 © Ahmed Nader, 2013

Done in a clean room (Fab facility) Takes 6-8 weeks IC Fabrication Semiconductor device fabrication is the process used to create integrated circuits (silicon chips) Done in a clean room (Fab facility) Takes 6-8 weeks 4/28/2017 © Ahmed Nader, 2013

Video 4/28/2017 © Ahmed Nader, 2013

Semiconductor Industry Semiconductor IC industry had revenues that reached $295 billion last year (2012). Microcontrollers (MC), Digital Signal Processors (DSP) and Microprocessors (MP) have been the center of the IC revolution since the beginning. The Personal Computer (PC) boom of the last century has become the Smartphone, Entertainment Console, Notebook and Tablet explosion in the new millennium. Largest companies in that industry are: Intel with $50 billion revenue in 2012. Samsung Electronics ranked second. Qualcomm, Texas instruments, Toshiba rounding out the top 5. Largest manufacturers (Fab facilities): Intel, TSMC, STMicroelectronics, IBM 4/28/2017 © Ahmed Nader, 2013

PDK=Process Development Kit CMOS Cross Section PDK=Process Development Kit Remember Z dimensions cannot be changed and are fab dependent 4/28/2017 © Ahmed Nader, 2013

Devices in a PDK 4/28/2017 © Ahmed Nader, 2013

Integrated Resistors 4/28/2017 © Ahmed Nader, 2013

Integrated Resistors 4/28/2017 © Ahmed Nader, 2013

Diffusion Resistors 4/28/2017 © Ahmed Nader, 2013

In range of pF Accuracy +/-15% Integrated Capacitors: Poly-Poly 4/28/2017 © Ahmed Nader, 2013

Integrated Capacitors: MIM (Metal-Insulator-Metal) 4/28/2017 © Ahmed Nader, 2013

Integrated Capacitors: MOM (Metal-Oxide-Metal) 4/28/2017 © Ahmed Nader, 2013

Widely Used in RF circuits (L in the range of nH) Low quality factor Integrated Inductors Widely Used in RF circuits (L in the range of nH) Low quality factor 4/28/2017 © Ahmed Nader, 2013

Integrated Inductors: Multi-Layer Spiral Inductors 4/28/2017 © Ahmed Nader, 2013

An Example of a Commercial IBM Process 4/28/2017 © Ahmed Nader, 2013

An Example of a Commercial IBM Process 4/28/2017 © Ahmed Nader, 2013

Wi-Fi Receiver 17mm2 Packaged Chip + Chip Micrograph 4/28/2017 © Ahmed Nader, 2013

MOS Structure A piece of polysilicon with a width of W and length of L on top of a thin layer of oxide defines the gate area. Source and drain areas are heavily doped. Substrate usually tied to the most negative voltage. Leff = L – 2LD, where LD is the side diffusion of source and drain. 4/28/2017 © Ahmed Nader, 2013

MOS characteristics – Threshold Voltage 4/28/2017 © Ahmed Nader, 2013

MOS characteristics – Threshold Voltage     4/28/2017 © Ahmed Nader, 2013

MOS characteristics – Threshold Voltage   Remember PVT (Process, Voltage, Temperature Variations) 4/28/2017 © Ahmed Nader, 2013

MOS I-V characteristics   4/28/2017 © Ahmed Nader, 2013

MOS I-V characteristics   4/28/2017 © Ahmed Nader, 2013

MOS I-V characteristics   4/28/2017 © Ahmed Nader, 2013

MOS Device as a Resistor 4/28/2017 © Ahmed Nader, 2013

MOS I-V characteristics   4/28/2017 © Ahmed Nader, 2013

MOS I-V characteristics   4/28/2017 © Ahmed Nader, 2013

MOS: In Saturation   4/28/2017 © Ahmed Nader, 2013

MOS: Channel length modulation Channel length modulation by VDS causes the saturation current to vary with VDS.   λ is the channel length modulation parameter (V-1) 4/28/2017 © Ahmed Nader, 2013

MOS: Channel length modulation λ undesired second order effect 4/28/2017 © Ahmed Nader, 2013

MOS: Substrate or Body Effect   4/28/2017 © Ahmed Nader, 2013

Can be used in low-voltage applications MOS: Bulk Driven Can be used in low-voltage applications 4/28/2017 © Ahmed Nader, 2013

Body Effect: Non-linearity 4/28/2017 © Ahmed Nader, 2013

Substrate: Where to connect it? For NMOS To the most negative available potential To a carefully designed potential (for example source such that VSB=0) in the case of twin well process or triple well (deep NWELL) process 4/28/2017 © Ahmed Nader, 2013

Triple Well Option 4/28/2017 © Ahmed Nader, 2013

Region of Operation: Conceptual Visualization VDS < VGS-VTH  MOS transistor in linear region. In linear region, MOS transistor acts as a resistor or a switch. NMOS PMOS 4/28/2017 © Ahmed Nader, 2013

MOS: Subthreshold (Weak Inversion) Subthreshold Conduction: For VGS near VTH, ID has an exponential dependence on VGS: Max transconductance efficiency Used for low currents & low frequency applications 4/28/2017 © Ahmed Nader, 2013

MOS: Intrinsic Capacitance C1 is the gate-channel capacitance C2 is the channel-bulk depletion capacitance C3 & C4 is the overlap gate-source(drain) capacitance C5 & C6 is the source/drain –bulk junction capacitance (bottom-plate and sidewall) Note that junction capacitors are voltage-dependent (non-linear) 4/28/2017 © Ahmed Nader, 2013

MOS: Intrinsic Capacitance     4/28/2017 © Ahmed Nader, 2013

MOS Device as a Capacitor: Varactor Assignment 1a: There is a special device with n-doping in an NWELL. Plot the characteristics of such a device. Comment on its properties. 4/28/2017 © Ahmed Nader, 2013

Small Signal Model The slope of the diode characteristic at the Q-point is called the diode conductance and is given by: gd is small but non-zero for ID = 0 because slope of diode equation is nonzero at the origin. Diode resistance is given by: 4/28/2017 © Ahmed Nader, 2013

Small Signal Operation of a Diode Subtracting ID from both sides of the equation, For id to be a linear function of signal voltage vd , This represents the requirement for small-signal operation of the diode. 4/28/2017 © Ahmed Nader, 2013

Current Controlled Attenuator Magnitude of ac voltage vo developed across diode can be controlled by value of dc bias current applied to diode. From ac equivalent circuit, From dc equivalent circuit ID = I, For RI = 1 kW, IS = 10-15 A, If I = 0, vo = vi, magnitude of vi is limited to only 5 mV. If I = 100 mA, input signal is attenuated by a factor of 5, and vi can have a magnitude of 25 mV. 4/28/2017 © Ahmed Nader, 2013

Small-Signal Model of a MOS (Two-Port Model) Using 2-port y-parameter network, The port variables can represent either time-varying part of total voltages and currents or small changes in them away from Q-point values. 4/28/2017

Small-Signal Model of a MOS Transconductance: Output resistance: Since gate is insulated from channel by gate-oxide input resistance of transistor is infinite. Small-signal parameters are controlled by the Q-point. For same operating point, MOSFET has lower transconductance and lower output resistance that BJT. 4/28/2017

MOS Transistor     4/28/2017 © Ahmed Nader, 2013

Small Signal Model: Body Effect MOS Transistor Small Signal Model: Body Effect Drain current depends on threshold voltage which in turn depends on vSB. Back-gate transconductance is: 0 <  < 1 is called back-gate tranconductance parameter. 4/28/2017 © Ahmed Nader, 2013

Small-Signal Model of a MOS: High Frequency Model Voltage dependent current source (gmVgs) models dependence of drain current on gate-source voltage Output resistance models dependence of drain current on drain-source voltage (channel length modulation) Voltage dependent current source (gmbVbs) models dependence of drain current on bulk-source voltage (body effect) 4/28/2017 © Ahmed Nader, 2013

+ - Useful Model Small Signal: MOS Transistor 4/28/2017     +   - 4/28/2017 © Ahmed Nader, 2013

MOS Transistor Special Cases Bias point     4/28/2017 © Ahmed Nader, 2013

Deep Sub-Micron Technologies   4/28/2017 © Ahmed Nader, 2013

Fixed for the technology and fixed L     Fixed for the technology and fixed L   Low-voltage – High-Speed trade-off 4/28/2017 © Ahmed Nader, 2013

Deep Sub-Micron Technologies Some small geometry effects: 1- Gate leakage 2- Threshold voltage variation 3- Output impedance variation with VDS (non-linearity) 4- Mobility degradation with vertical field 5- Velocity saturation 6- Reliability Effects (GO, Hot Carrier, NBTI, ..) 7- Stress Effects (STI, Well Proximity, ..) Assignment 1b: Choose one of those effects and describe it in details (physical meaning, effect on performance, etc.) 4/28/2017 © Ahmed Nader, 2013

Deep Sub-Micron Technologies What about scaling of Vth? 4/28/2017 © Ahmed Nader, 2013

Deep Sub-Micron Technologies – Mobility degradation with Vertical Field Carriers are confined to a narrower region below oxide-silicon interface leading to more carrier scattering and hence lower mobility 4/28/2017 © Ahmed Nader, 2013

Deep Sub-Micron Technologies – Velocity Saturation     4/28/2017 © Ahmed Nader, 2013

Deep Sub-Micron Technologies – Velocity Saturation   4/28/2017 © Ahmed Nader, 2013

MOS Device Models Level 3 Model BSIM (Berkeley Short-Channel IGFET Model) 4/28/2017 © Ahmed Nader, 2013