CMS Drift Tube Chambers: Activities during LS1 & future upgrades Jesús Puerta Pelayo CIEMAT IV CPAN DAYS Sevilla, 20 – 22 Oct 2014 Summary The muon DT detector in CMS CMS timeline & upgrades Consolidation & upgrades to the DT system: DT maintenance LS1 Phase 1 upgrade plans Phase 2 upgrade plans

Gaseous detectors. Alternate layers of drift cells. Drift signals collected in wire anodes Robust, redundant (& affordable) tracking system. Max 44 projective points Almost linear space-time relationship. Vdrift ~ 55 μm/ns-, Max drift time ~380 ns Single wire resolution ~ 250 μm Local reconstruction (r-f) ~ 100 μm Efficient (Above 99.5%) 250 chambers, >170k channels 5 wheels 4 stations 12 sectors DTs are responsible for muon tracking and triggering in the barrel MB2MB4s CIEMAT built the complete MB2 station and part of the MB4s (70 chambers) The Drift Tube Chambers Anode: Sense wire (3600V) Electric field shaper strips (1800 V) Cathode: Al strips (-1200V) Basic layout: SUPERLAYERS 4 layers of staggered cells Avoid left-right indetermination Redundancy & avoid dead zones A SL provides a 2D projection of the muon track 3 superlayers glued together form a DT chamber 8 points in r-φ 4 points in r-θ Redundant Gas: Ar/CO 2, 85/15 % The Drift Tube cell Basic unit: the drift cell

DT detector showed one of the best data taking efficiencies among all CMS subsystems Excellent subdetector status (live channels %), above the CMS average, at the end of 2012 data taking Negligible downtime caused by DTs Of course there’s room for improvement. Interventions performed during LS1 will raise this % What does CMS expect from us (& rest of subsystems) in the years to come? DT performance during RunI Excellent performance of the LHC ~30 fb -1 delivered in CMS recorded about 22 fb -1 in 2012 (8 TeV) and ~6 fb -1 in 2011 (7 TeV)

HL-LHC will operate at 5×10 34 cm -2 s -1 instantaneous luminosity, with leveling Translated to 140, a huge challenge in terms of L1 acceptance TRIGGER UPGRADE WILL HOLD THE KEY New detectors : – High granularity – Radiation hard Target: to collect 3000 fb -1 integrated over more than 10 years LHC timeline TeV Total L int (pp) before LS3: 300 – 500 fb -1 L max (pp) ~ Hz/cm 2 Phase-1 Phase-2: HL-LHC GOAL after LS3: Total L int (pp) 3000 fb -1 L level (pp) ~ Hz/cm 2

LS1 Upgrades New muon disks RPCs extending coverage (ME4) Improve muon operation (ME1) Replace HCAL photo-detectors in Forward (new PMTs) and Outer (HPD-> SiPM) Upgrade of DAQ (DAQ2) LS2 Upgrades (TDRs) New Pixel detector, HCAL electronics and L1-Trigger GEM detectors for muon endcap (under cost review) Preparatory work during LS1 - New beam pipe - Install test slices - Pixel (cooling), HCAL, L1-trigger - Install ECAL optical splitters - L1-trigger upgrade, transition to operations CMS Phase 1 Upgrade Highlights 2013/ /19 Phase 1 CMS New Pixel Phase1 in 2017: planar pixels

Trigger/DAQ L1 (hardware) with tracks and rate up ∼ 500 kHz to 1 MHz Latency ≥ 10 µs HLT output up to 10 kHz Muons Replace DT FE electronics Complete RPC coverage in forward region (new GEM/RPC technology) Investigate Muon-tagging up to η ∼ 4 New Endcap Calorimeters Radiation tolerant - high granularity Investigate coverage up to η ∼ 4 New Tracker Radiation tolerant - high granularity - less material Tracks in hardware trigger (L1) Coverage up to η ∼ 4 Barrel ECAL Replace FE electronics CMS Phase 2 Upgrade Highlights

Extensive campaign of repairs in MINICRATES (MC, Local on-chamber TR & RO electronic containers) DT LS1 activities: MC interventions Replacement of Theta Trigger Boards (TTRBs): The TTRB work aims at reconstituting the stock of spare Bunch-and-Track-Identifier ASICs for the long-term operation of the chamber minicrates Replaced old TRBs by FPGA version of theta-trigger- board in external wheels > 3k channels recovered (178k total)

16 chambers (out of 250) have suffered HV problems since All of them fixed during LS1 YB0 MB1 S01: Extracted and intervened in vertical position YB0 MB1 S04 & YB0 MB4 S04: Extracted with the installation cradle & intervened on the floor In situ opening of chambers in moveable wheels with scissor lift. Tricky in some cases due to inclined position. Full extraction required in YB0 for any intervention what requires a fair amount of preparation. HV side is not accessible due to fixed services, extraction is needed for chamber opening. It requires uncabling of the involved sector. Miscelaneous HV problems found, mostly strip discharges (gas flow displacing impurities ). No visible signs of ageing in any internal component. Gas tightness of the chambers has not degraded since DT LS1 activities: HV interventions ~350 channels recovered in 16 interventions (0.1% total)

RUN I SETUP: RO & TR signals generated in the MCs, sent & collected to custom collector boards in the experimental cavern (TSC & ROS) Combination of data from different sectors performed in USC (DDU & DTTF) Sector Collector relocation: ROS & TSC moved from UXC to USC 20 new electronic crates, ~400 boards installed New fibers from UXC to USC, full trigger information available in USC In preparation for the Level-1 trigger upgrade in 2016 (TwinMux, new DT/RPC/HO concentrator) Any intervention will be possible without accessing the experimental cavern (only the service cavern, no radiation) Performance improved during runs Future upgrades are decoupled from LHC Shutdowns DT LS1 activities: Relocation of SC Crates Cross section of CMS caverns

Terminar mejora Fase I : run II+ LS2 Replace Trigger Sector Collector (TSC) and Readout server (ROS) boards with more powerful μTCA electronics -ROS -TSC μROS TwinMux RPC+HO Gbps 8 Gbs to cDAQ via backplane &AMC13 8 Gbs to TFs DT Phase 1 upgrades: New TR & RO No need to access the experimental cavern (only the service cavern, no radiation) Future upgrades are decoupled from LHC Shutdowns Recycling of OFCu optical receivers

The SC relocation will allow testing the first prototypes during Run II Presumably the replacement of VME electronics for μTCA will take place during LS2 15cm New CMS standard in electronics: μTCA substitutes VME It allows the use of much faster serial links (5- 10 Gbps) in optical links & backplane Much better & dense performance But denser cabling & higher power disipation μROS board FW on TwinMux replacing the current RO electronics (ROS). Joint project CIEMAT + Padova Phase I upgrades: RO μ TCA

DT RPC Need to refurbish TSC and reduce trigger rate /2 Combining information from various subdetectors at low level (DT + RPC + HO) for each station Profiting from excelent: ⁻Track ID from DTs ⁻Position resolution from DTs ⁻Time resolution from RPCs Improves redundancy SuperPrimitives The new Trigger Sector Collector (TSC)+++ will be TwinMux HO SiPM scintillators outside the magnet (mips) Integration of multiple systems made possible multiplexing slow links into new links Replication of primitives helps combining diferent sectors Phase I upgrades: TwinMux

El largo plazo empieza hoy: HL-LHC : Time to evaluate: Will the DT detector stand the HL-LHC conditions, maintaining an acceptable performance? ⁻Previous studies & performance during RunI indicate the chambers are robust (to be confirmed in future irradiation tests) ⁻However, on-chamber electronics (Minicrate, where local trigger & signal RO digitization are performed) will be no longer operational with high efficiency for the whole HL-LHC period: i.Radiation hardness of the control boards (CCB) ii.Aging of a multi-part system (water cooling, huge & fragmented power system, 25 kW) iii.Access constraints (safety) for future maintenance (ALARA) iv.Data Readout inefficiency, limited to bandwith designed for cm −2 s −1, (Expected rate ~500 KHz-1 MHz, whereas maximum rate for our current electronics is around 300 KHz L1A) v.Trigger latency (4μs -> >10μs) Phase 2: The (not so) distant future

DT longevity Several tests performed in the past with prototypes & real size chambers have shown no degradation in performance in high-radiation environments. No indication as of today that chambers will decrease their reliability during Phase 2. However: It is fundamental to study and quantify any possible source of performance degradation by all detector-specific contributions: Wire ageing, outgassing, dark currents, glue ageing, failure in insulators… Background inducing fake signals or ghost tracks Failures in internal electronics (Front End Boards, High Voltage Boards…) It is therefore required to 1.Complete these tests in GIF++ (irradiation and high noise rate studies) 2.Study and monitor detector performance vs HV (Lower operation point?) 3.Keep infraestructure under control (cooling, power supplies, gas…)

Mejoras Fase II : run III+ LS3 -ROS -TSC Gbps RPC+HO New MC New backend USC UXC x250 x few 8 GBps On-wheel fibers x few 8 GBps Gbps MHz A Sorter New insfrastructure will recycle current optical receivers Minicrates will be redesigned & replaced during LS3. The target is to relocate as much as possible the electronics complexity to the service cavern 1. New MC will be a simple time digitizer, that will transmit data from the experimental cavern to the service cavern via optical fiber Based in rad-hard FPGAs (no ASICs, no wire bonds), flexibility 2. Trigger logics will be implemented in a rad-free environment (USC), using commercial electronics (cheaper, powerful) 3. Simplicity (less fragmented) and robust (less disipation) Optical link pannel Phase 2: New electronics

−Generator − Level-1 − HLT with tracker −HLT w/o Tracker Information from θ superlayers is fundamental to improve track extrapolation to the inner tracker TK Phase 2 will send trigger info for p t >2 GeV segments PU= : precision in combinations will be crucial HW? FPGAs,Associative Memories (SVT,Atlas)… Several options on the table. Algorithm to be defined first. Higher latency Phase 2: New TR logic New TR will use TK hits at L1, all combinations possible. Reducing rate will be at hand Big room for improvement in trigger logics Dead time/hit: 400 ns ➔ 100 ns Better hits for segment composition φ : 12.5 ns ➔ 1 ns Resolution θ: 32 cm ➔ 500 μm No limits in tracks per chamber No more chamber boundaries (combination possible)

Conclusions The DT detector performed remarkably well all through Run I Excellent resolution, reconstruction capabilities, trigger Negligible deadtime LS1 interventions have fixed most electronics & detector problems occurred since 2010  Thousands of recovered channels  Recovery of TR chips for future interventions in MCs First steps towards upgrade: SC collector relocation Will even help performing better during Run II (Interventions on RO & TR system possible anytime) Next step in LS2 will be the replacement of TR & RO USC electronics  Following CMS standards, µTCA for a faster & more reliable system.  Combination of different subdetectors will be fundamental for TR rate reduction Phase 2 will be an extraordinary oportunity to improve further and exploit the possibilities of our detector New local electronics, new TR logic -> Longer lifetime, possibility to operate >20 y.o. detectors in a harsh environment Long road ahead…