Lecture No. 14 Combinational Functional Devices
Digital Logic &Design Dr. Waseem Ikram Lecture 14
Recap Odd-Prime Number Detector Circuit Using Quine-McCluskey Method Combinational Logic Implemented in SOP and POS form Design and Implementation Steps Timing Diagram Active High/Low inputs/outputs
Odd-Parity Function InputOutputInputOutput D3D3 D2D2 D1D1 D0D0 PD3D3 D2D2 D1D1 D0D0 P
SOP Expression SImplification D3D2\D1D0D3D2\D1D
Simplifying Expression
Odd-Parity Generator Circuit
Operation of Odd-Parity circuit
XOR & XNOR Gates XOR function XNOR function
XOR Gate
XNOR Gate
Combinational Functional Devices Comparators BCD to 7-Segment Parity Generator Circuit
Half & Full Adders Half Adder Full Adder
Half & Full Adders
Half-Adder Function Table Expression Logic Circuit
Half-Adder Function Table InputOutput ABSumCarry Out
Half-Adder Circuit
Full-Adder Function Table Expression Logic Circuit
Full-Adder Function Table InputOutput ABCarry In (C) SumCarry Out
Sum Expression
Carry Out Expression
Full-Adder Circuit
Full-Adder Full-Adder = Half-Adder + Half-Adder
Full-Adder based on Two Half-Adders
Parallel Binary Adder Multiple Single bit Full-Adder connected in Parallel
4-bit Parallel Adder
Carry Propagation Carry Ripple Look-Ahead Carry Circuits
Look-Ahead Carry Circuit
Sum & Carry Expressions
Carry Expressions
Look-Ahead Carry Generator
MSI-Adders 74LS83A 74LS pin ICs 4-bit A input 4-bit B input 4-bit Sum output 1-bit Carry in 1-bit Carry Out
12-bit Parallel Adder