ASSEMBLY CODE EEE 365 [FALL 2014] LECTURE 24 ATANU K SAHA BRAC UNIVERSITY.

Slides:

Advertisements

Similar presentations

MICROPROCESSORS AND MICROCONTROLLERS

Advertisements

Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes.

1 ECE 372 – Microcontroller Design Parallel IO Ports - Outputs Parallel IO Ports E.g. Port T, Port AD Used to interface with many devices Switches LEDs.

The Intel 8255 Programmable Peripheral Interface chip is used to give the microprocessor (8088) access to programmable input/ output devices. It has three.

Seven Segment Display. What's A 7-Segment Display? A 7-segment display is a package with 7 bar-shaped LEDs arranged to allow the display of many useful.

Parul Polytechnic Institute

TK2633 Introduction to Parallel Data Interfacing DR MASRI AYOB.

82C55 82C55 Programmable Peripheral Interface Interfacing Part III.

University of Tehran 1 Microprocessor System Design Interrupt Omid Fatemi

Processor System Architecture

Lab 6 :Digital Display Decoder: 7 Segment LED display Slide #2 Slide #3 Slide #4 Slide #5 Slide #6 Slide #7 Display Decoder Fundamentals LT Control Input.

Interrupts – (Chapter 12)

Microprocessor and Microcontroller Based Systems Instructor: Eng.Moayed N. EL Mobaied The Islamic University of Gaza Faculty of Engineering Electrical.

1 © Unitec New Zealand Embedded Hardware ETEC 6416 Date: - 10 Aug,2011.

Khaled A. Al-Utaibi  Intel Peripheral Controller Chips  Basic Description of the 8255  Pin Configuration of the 8255  Block Diagram.

Micro-Computer Applications: Procedures & Interrupts Dr. Eng. Amr T. Abdel-Hamid ELECT 707 Fall 2011.

Dr. Rabie A. Ramadan Al-Azhar University Lecture 6

Input/Output Interface Circuits and LSI Peripheral Devices

Khaled A. Al-Utaibi  Interrupt-Driven I/O  Hardware Interrupts  Responding to Hardware Interrupts  INTR and NMI  Computing the.

8086/8088 Hardware Specifications Power supply:  +5V with tolerance of ±10%;  360mA. Input characteristics:  Logic 0 – 0.8V maximum, ±10μA maximum;

1 Microprocessor-based Systems Course 8 Design of input/output interfaces.

8086 has 2 interrupt inputs 1. NMI 2. INTR For application where we have interrupts from multiple sources, use an external device called a Priority Interrupt.

I/O Interfacing A lot of handshaking is required between the CPU and most I/O devices. All I/O devices operate asynchronously with respect to the CPU.

Interrupts Useful in dealing with: The interface: Random processes;

Accessing I/O Devices Processor Memory BUS I/O Device 1 I/O Device 2.

ECE291 Computer Engineering II Lecture 3 Josh Potts University of Illinois at Urbana- Champaign.

CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.

Strings, Procedures and Macros

Programmable Peripheral Interface Parallel port Interface 8255

Dec Hex Bin 14 E ORG ; FOURTEEN Interrupts In x86 PC.

12/16/  List the elements of 8255A Programmable Peripheral Interface (PPI)  Explain its various operating modes  Develop a simple program to.

Ass Prof Dr Masri Ayob TK 2633: Microprocessor & Interfacing Lecture 6: Control Instructions.

EE3721 Computer System Principles

UNIT-IV 8255 PPI Various Modes Of Operation Interfacing To 8086.

Magnitude Comparator Dr. Ahmed Telba.

ENEE 440 Chapter PPI 8255 Register Select -CS A1 A0 REGISTER R/W PORT A R/W PORT B R/W PORT C R/W CR W 1 X X8255 NOT.

ECE291 Computer Engineering II Lecture 3 Dr. Zbigniew Kalbarczyk University of Illinois at Urbana- Champaign.

Interrupt-Driven I/O There are different types of interrupts –Hardware Generated by the 8259 PIC – signals the CPU to suspend execution of the current.

BIOS and DOS Interrupts Basic Input /Outpu System Disk Operating System.

8085 INTERNAL ARCHITECTURE.  Upon completing this topic, you should be able to: State all the register available in the 8085 microprocessor and explain.

Internal Programming Architecture or Model

Examples Lecture L2.2. // Example 1a: Turn on every other segment on 7-seg display #include /* common defines and macros */ #include /* derivative.

MICROCONTROLLER INTERFACING WITH STEPPER MOTOR MADE BY: Pruthvirajsinh Jadeja ( ) COLLEGE:DIET BRANCH:EC.

Tutorial 9 Module 8 – 8.1,8.2,8.3. Question 1 Distinguish between vectored and non-vectored interrupts with an example Build a hardware circuit that can.

Intel 8259A PIC EEE 365 [FALL 2014] LECTURE 21 ATANU K SAHA BRAC UNIVERSITY.

8 085Microprocessor Temp Reg (8) Accumulator (A reg) Flag flip flops(8) Instruction Register (8) Arithmetic Logic Unit ALU Instruction Decoder and Machine.

Intel 8255A PPI EEE 365 [FALL 2014] LECTURE ATANU K SAHA BRAC UNIVERSITY.

WEATHER MONITORING SYSTEM. User Requirements  Design a weather monitoring system that detects the following parameters  Temperature  Pressure  Relative.

Memory Interface EEE 365 [FALL 2014] LECTURER 12 ATANU K SAHA BRAC UNIVERSITY.

1 Interrupts A Course in Microprocessor Electrical Engineering Dept. University of Indonesia.

Revision questions CENG2400 v.14b 1 CENG2400 Revision, Question 1 A system has an ARM processor with a 32-bit General Purpose Input Output (GPIO) module.

Microprocessor and Assembly Language

Microprocessor Systems Design I

Introduction to the processor and its pin configuration

Display Devices 7 segment led display.

8254 – SOFTWARE PROGRAMMABLE TIMER

Interrupts – (Chapter 12)

8085 microprocessor.

8085 Interrupts.

8259A PRIORITY INTERRUPT CONTROLLER

8259 Chip The Intel 8259 is a family of Programmable Interrupt Controllers (PIC) designed and developed for use with the Intel 8085 and Intel 8086 microprocessors.

CENG2400 Revision Q1a A system has an ARM processor with a 32-bit General Purpose Input Output (GPIO) module. Two on/off switches are connected to bit-3.

Engineering 4862 Microprocessors Lecture 25

Final Exam Review Department of Electrical and Computer Engineering

Programmable Peripheral Interface

8259 Programmable Interrupt Controller

The Programmable Peripheral Interface (8255A)

Computer Operation 6/22/2019.

Microprocessor and Assembly Language

Presentation transcript:

ASSEMBLY CODE EEE 365 [FALL 2014] LECTURE 24 ATANU K SAHA BRAC UNIVERSITY

EEE 365 : MICROPROCESSOR ATANU K SAHA 2 ASSEMBLY CODE BRAC UNIVERSITY DATA SEGMENT ; data variables are initialized here DATA ENDS EXTRA SEGMENT ; EXTRA ENDS STACK SEGMENT ; stack contents are initialized here STACK ENDS CODE SEGMENT ASSUME CS:CODE, DS:DATA, ES:EXTRA, SS:STACK START: ; codes are written here CODE ENDS ENDSTART BASIC CODE FLOW Within the code we have to initialize the followings 1.Data Segment 2.Stack Segment 3.Extra Segment 4.Stack Pointer PPI PIC timer Serial interface 9.Initialize Data variables 10.Set Interrupt enable flag

EEE 365 : MICROPROCESSOR ATANU K SAHA 3 ASSEMBLY CODE BRAC UNIVERSITY DATA SEGMENT PPDW0220H QQDW 0015H RRDW2 DUP(0) DATA ENDS CODE SEGMENT ASSUME CS:CODE, DS:DATA, ES:EXTRA, SS:STACK START: MOVAX, DATA MOVDS,AX MOVAX, PP MULQQ MOV RRAX MOV RR+2,DX INT 3 CODE ENDS ENDSTART Example:1 SIMPLE MULTIPLICATION RR = PP X QQ

EEE 365 : MICROPROCESSOR ATANU K SAHA 4 ASSEMBLY CODE BRAC UNIVERSITY IVTSEGMENT TYPE_64DW2 DUP(0) TYPE_65DW2 DUP(0) IVTENDS DATA SEGMENT FINALCDW0000 H DATA ENDS CODE SEGMENT ASSUME CS:CODE, DS:IVT START:MOVAX, IVT MOVDS,AX MOVTYPE_64+2,SEG UPC MOVTYPE_64,OFFSET UPC MOVTYPE_65+2,SEG DWC MOVTYPE_65,OFFSET DWC ASSUME DS:DATA MOVAX, DATA MOVDS,AX MOVAL, B MOVDX,FF00H OUTDX,AL;ICW1 MOVAL, B MOVDX,FF02H OUTDX,AL;ICW2 Example2: Suppose the INTR pin of an 8086 microprocessor is connected with an 8259 PIC’s INT pin. The 8259 can take Type-64 and Type-65 interrupt in its IR0 and IR1 pin respectively which are positive edge sensitive. The 8086 up count a value in its memory location if Type-64 interrupt occurs and down count if Type-65 occurs. The 8259 PIC is connected at FF00 H as a port device. MOVAL, B OUTDX,AL;ICW4 MOVAL, B OUTDX,AL ;OCW1 HERE:JMPHERE UPC PROC INCFINALC MOVAL, B MOVDX,FF00H OUTDX,AL;OCW2 IRET UPCENDP DWC PROC DECFINALC MOVAL, B MOVDX,FF00H OUTDX,AL;OCW2 IRET DWCENDP CODE ENDS END START Assembly code

EEE 365 : MICROPROCESSOR ATANU K SAHA 5 ASSEMBLY CODE BRAC UNIVERSITY Example2: (Continue…) Suppose the INTR pin of an 8086 microprocessor is connected with an 8259 PIC’s INT pin. The 8059 can take Type-64 and Type-65 interrupt in its IR0 and IR1 pin respectively which are positive edge sensitive. The 8086 up count a value in its memory location if Type-64 interrupt occurs and down count if Type-65 occurs. The 8259 PIC is connected at FF00 H as a port device. Circuit connection

EEE 365 : MICROPROCESSOR ATANU K SAHA 6 ASSEMBLY CODE0 BRAC UNIVERSITY Example3: Suppose an 8086 is connected with a 8255A PPI. Port A is connected with four 7-segment display’s common anode pin. Port C is connected with the input of a 74LS47 binary to 7-seg decoder. The output of the decoder is connected with the input of the 7-segment displays. Now write an assembly code which display 1, 2, 3, 4 in the 7-segment displays. The 8255 PPI is connected at FF00 H as a port device. Circuit connection

EEE 365 : MICROPROCESSOR ATANU K SAHA 7 ASSEMBLY CODE BRAC UNIVERSITY Example3: (Continue…) Suppose an 8086 is connected with a 8255A PPI. Port A is connected with four 7-segment display’s common anode pin. Port C is connected with the input of a 74LS47 binary to 7-seg decoder. The output of the decoder is connected with the input of the 7-segment displays. Now write an assembly code which display 0, 1, 2, 3 in the 7-segment displays. The 8255 PPI is connected at FF00 H as a port device. Turn off all SSD Send data for Digit 1 Turn on SSD1 Wait for some time Turn off all SSD Send data for Digit 2 Turn on SSD2 Wait for some time Turn off all SSD Send data for Digit 3 Turn on SSD3 Wait for some time Turn off all SSD Send data for Digit 4 Turn on SSD4 Wait for some time Algorithm

EEE 365 : MICROPROCESSOR ATANU K SAHA 8 ASSEMBLY CODE BRAC UNIVERSITY Example3: (Continue…) Suppose an 8086 is connected with a 8255A PPI. Port A is connected with four 7-segment display’s common anode pin. Port C is connected with the input of a 74LS47 binary to 7-seg decoder. The output of the decoder is connected with the input of the 7-segment displays. Now write an assembly code which display 0, 1, 2, 3 in the 7-segment displays. The 8255 PPI is connected at FF00 H as a port device. PORTAEQUFF00H PORTBEQUFF02H PORTCEQUFF04H PORTCWEQUFF06H DATA SEGMENT DEC0DB00H DEC1DB01H DEC2DB02H DEC3DB03H DATA ENDS CODE SEGMENT ASSUME CS:CODE, DS:DATA MOVAX,DATA MOVDS,AX MOVAL, B OUTPORTCW,AL L1:OUTPORTB, DEC0 OUTPORTA, B CALLDELAY OUTPORTA, B OUTPORTB, DEC1 OUTPORTA, B CALLDELAY OUTPORTA, B OUTPORTB, DEC2 OUTPORTA, B CALL DELAY OUTPORTA, B OUTPORTB, DEC3 OUTPORTA, B CALLDELAY OUTPORTA, B JMP L1 DELAY:MOVCX,FFFFH; AGAIN:NOP NOP LOOPAGAIN RET CODE ENDS END Assembly code