Computer-system operation (The OS initialization phase) ROM RAM 1 2 3.

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Presentation transcript:

Computer-system operation (The OS initialization phase) ROM RAM 1 2 3

Interrupt Handling 1.Save the CPU status (including the CPU status register, program counter and some other registers) 2.Interrupt handling depends on the type of interrupt – polling – vectored interrupt system – vectored interrupt system + polling 3.Execute the interrupt service routine.

Direct Memory Access Structure (DMA) bus

Dual-mode operation OS applications AP2 User mode Kernel mode trap ISR Syscall_handler Exception := Trap := Software interrupt Exception := Trap := Software interrupt 1.Mode=kernel_mode Push PC 1.Save machine status 2.Jump_to ISR 1.Mode=kernel_mode Push PC 1.Save machine status 2.Jump_to ISR CPU

System Call Parameter Passing Often, more information is required than simply identity of desired system call Three general methods used to pass parameters to the OS – Simplest: pass the parameters in registers – Parameters stored in a block, or table, in memory, and address of block passed as a parameter in a register – Parameters placed, or pushed, onto the stack by the program and popped off the stack by the operating system

Operating System Design and Implementation Design and Implementation of OS not “solvable”, but some approaches have proven successful Internal structure of different Operating Systems can vary widely Start by defining goals and specifications Affected by choice of hardware, type of system User goals and System goals – User goals – operating system should be convenient to use, easy to learn, reliable, safe, and fast – System goals – operating system should be easy to design, implement, and maintain, as well as flexible, reliable, error-free, and efficient

Operating System Design and Implementation (Cont.) Important principle to separate Policy: What will be done? Mechanism: How to do it? Mechanisms determine how to do something, policies decide what will be done The separation of policy from mechanism is a very important principle, it allows maximum flexibility if policy decisions are to be changed later

Layered Operating System

Modules Most modern operating systems implement kernel modules – Uses object-oriented approach – Each core component is separate – Each talks to the others over known interfaces – Each is loadable as needed within the kernel Overall, similar to layers but with more flexible

Solaris Modular Approach

Modules & micro kernel

stack heap uninitialized data initialized data text (code) OS kernel int a = 2; int b; void main() { int c; int d; int* e = (int*)malloc(sizeof(int)*1024); /*…*/ } a a b b c c d d e e

Process in Memory stack heap uninitialized data initialized data text (code) OS kernel 0 MAX Kernel space user space initialized data text (code) header The executable program file

Schedulers (Cont.) I/O-bound process – I/O time >> CPU time – Example: ftp server CPU-bound process – I/O time >> CPU time – Example: image processing i/oCPUi/o CPUI/OCPU

Direct Communication Processes must name each other explicitly: – send (P, message) – send a message to process P – receive(Q, message) – receive a message from process Q Properties of communication link – Links are established automatically – A link is associated with exactly one pair of communicating processes – Between each pair there exists exactly one link – The link may be unidirectional, but is usually bi- directional

Indirect Communication Messages are directed and received from mailboxes (also referred to as ports) – Each mailbox has a unique id – Processes can communicate only if they share a mailbox Properties of communication link – Link established only if processes share a common mailbox – A link may be associated with many processes – Each pair of processes may share several communication links – Link may be unidirectional or bi-directional

Motivation - the overhead of using processes The overhead of context-switch – + store/restore the register file (~1kB) – + TLB miss (~1kB) – + CPU cache miss (~1MB) CPU (core) L1$ L2$ MMU (+TLB) Reg. 1 cycle 5 cycles 25 cycles

Single and Multithreaded Processes

Threading Issues fork() and exec() – Does fork() duplicate only the calling thread or all threads? – exec() will replace the entire process including all threads Cancellation – Asynchronous cancellation – Synchronous cancellation

Alternating Sequence of CPU And I/O Bursts

Histogram of CPU-burst Times

CPU Scheduler Selects from among the processes in memory that are ready to execute, and allocates the CPU to one of them CPU scheduling decisions may take place when a process: 1.Switches from running to waiting state 2.Switches from running to ready state 3.Switches from waiting to ready 4.Terminates Scheduling under 1 and 4 is nonpreemptive All other scheduling is preemptive

Scheduling Criteria CPU utilization – keep the CPU as busy as possible Throughput – # of processes that complete their execution per time unit Turnaround time – amount of time to execute a particular process Waiting time – amount of time a process has been waiting in the ready queue Response time – amount of time it takes from when a request was submitted until the first response is produced, not output (for time-sharing environment)

Example of Preemptive SJF ProcessArrival TimeBurst Time P P P P SJF (preemptive) Average waiting time = ( )/4 = 3 P1P1 P3P3 P2P P4P4 57 P2P2 P1P1 16

SJF improves I/O performance!?

Determining Length of Next CPU Burst Can be done by using the length of previous CPU bursts, using exponential averaging

Example of RR with Time Quantum = 20 ProcessBurst Time P 1 53 P 2 17 P 3 68 P 4 24 The Gantt chart is: Typically, higher average turnaround than SJF, but better response P1P1 P2P2 P3P3 P4P4 P1P1 P3P3 P4P4 P1P1 P3P3 P3P

思考 當 time quantum 趨近於「無窮大」 當 Time quantum 趨近於「 0 」

Example of Multilevel Feedback Queue Three queues: – Q 0 – RR with time quantum 8 milliseconds – Q 1 – RR time quantum 16 milliseconds – Q 2 – FCFS Scheduling – A new job enters queue Q 0 which is served FCFS. When it gains CPU, job receives 8 milliseconds. If it does not finish in 8 milliseconds, job is moved to queue Q 1. – At Q 1 job is again served FCFS and receives 16 additional milliseconds. If it still does not complete, it is preempted and moved to queue Q 2.

Multilevel Feedback Queues

Race Condition Consider this execution interleaving with “count = 5” initially Producer register1 = count {register1 = 5} register1 = register1 + 1 {register1 = 6} count = register1 {count = 6 } Consumer register2 = count {register2 = 5} register2 = register2 - 1 {register2 = 4} count = register2 {count = 4} R R w w

Solution to Critical-Section Problem 1.Mutual Exclusion - If a process is executing in its critical section, then no other processes can be executing in their critical sections 2.Progress - If no process is executing in its critical section and there exist some processes that wish to enter their critical section, then the one of the processes will enter the critical section 3.Bounded Waiting - A bound must exist on the number of times that other processes are allowed to enter their critical sections after a process has made a request to enter its critical section and before that request is granted

Algorithm for Process P i while (true) { flag[i] = TRUE; turn = j; while ( flag[j] && turn == j); /*CRITICAL SECTION*/ flag[i] = FALSE; /*REMAINDER SECTION*/ }

Solution using TestAndSet Shared boolean variable lock., initialized to false. while (true) { while ( TestAndSet (&lock )) ; // do nothing // critical section lock = FALSE; // remainder section }