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CAD/Computer Systems Laboratory Dept. of Electronics Engineering 전자공학 개론 [ Digital / Computer 시스템편] 1. Digital Systems 2. Digital Logic CAD/Computer Systems Laboratory Dept. of Electronics Engineering 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital vs. Analog Systems (1) Basics Discrete vs. continuous Mixed (hybrid) systems ADC (Analog to Digital Conversion) quantization/digitization DAC (Digital to Analog Conversion) V  Analog Signal Time 4 3 1 4 5 Discrete Signal ( n : # encoding bits ) 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Binary Systems Most information processing systems are constructed using switches A sequence of decision making processes Immune to noise, more reliable Switches Mechanical Semiconductor PMOS switch NMOS switch 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Structure and Behavior (1) Functional modules (components) and their interconnections Block diagram, schematic diagram generic block symbols replaced by symbols with distinctive/standardized shapes Behavior Functionality, input/output relationships Truth table, equation, function, … 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Structure and Behavior (2) Structure Behavior a b out If (a==1) out = b else out = 0 VHDL structural description VHDL behavioral description Entity and2 is port (a, b : in bit; out : out bit ); end and2; architecture structure of and2 is component AND port( a, b : in bit; c : out bit ); end component; begin C1 : AND port map(a, b, out); end structure; Entity and2 is port (a, b : in bit; out : out bit ); end and2; architecture behavior of and2 is begin process if (a=‘1’) then out <= b ; else out <= ‘0’; endif; end process; end behavior; 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital system Design (1) Refinement process from specification to implementation or behavior to structure (Synthesis) Design levels Design can be described at various levels of abstraction or complexity Design hierarchy A component Ci at level i can be expanded (refined) to a multicomponent system at level i+1 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital system Design (2) Hierarchical design to reduce design complexity to partition a system into subsystems with manageable size Concurrent design by team members Reusable components (libraries) 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital system Design (3) Top-down vs. Bottom-up Architectural Logic Physical Full-custom design - Standard cell Semi-custom design (ASIC) Gate array, sea-of-gates, FPGA * IP-based Design, Platform-based Design Top-down design Bottom-up design 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital Systems and Digital Circuits Datapath Data storage Data transformation Data transfer Controller Hardwired Multi-level logic Two-level logic (PLA) Micro program Datapath Control FSM 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Two-level Circuit vs. Multi-level Circuit Two-level circuit Multi-level circuit Area O(2#inputs) O(#inputs) ~ O(#inputs2) Delay 2 * g > 2 * g (< 2 * g in MOS) Power large small #fan-ins / large small #fan-outs Implementation PLA random/hardwired logic ※  g : unit gate delay 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital Circuits (1) Combinational circuits Outputs determined by current inputs Structure : two- and multi-level logic Combinational Circuit Inputs X Outputs Z Output function  디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital Circuits (2) Sequential circuits Outputs depend not only on current inputs but also on past inputs (stored as ‘state’) Model Memory Comb. Circuit Inputs X Outputs Z Y Output function  next-state function  디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Digital Circuits (3) Synchronous and asynchronous circuits Synchronous circuit employs an independent, periodic clock signal C to synchronize all internal changes of state. Asynchronous circuit does not employ a periodic clock signal C to synchronize its internal changes of state. cf. Synchronous vs. asynchronous systems. 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Design Goals Functional specification implementations simulation/verification simulation/verification Cost Performance Propagation delay Access time (storage elements) Bandwidth Power consumption Testability and Reliability correct 디지탈/컴퓨터 서강대학교 전자공학과

Digital Systems - Design Tradeoffs Cost / Performance tradeoffs Engineering experiences Delay/Area/Power Cost 디지탈/컴퓨터 서강대학교 전자공학과

군사용 기기 (Missiles, 위치 추적, … ) Consumer 용 (HDTV, DVD, … ) 컴퓨터 시스템 Digital Systems - 응용 분야 Intelligent 시스템 자동화 기기 (레이저 프린터, 복사기, … ) 통신용 기기 (모뎀, 휴대폰, … ) 산업용 기기 (공작기, 생산 자동화 기기, … ) 군사용 기기 (Missiles, 위치 추적, … ) Consumer 용 (HDTV, DVD, … ) 컴퓨터 시스템 Microcomputers, PCs, workstations, minicomputers, mainframes, supercomputers 디지탈/컴퓨터 서강대학교 전자공학과

Digital Logic - 조합회로 (1) 특징 출력은 현재 입력 값에 의해 결정. 기억 소자를 포함하고 있지 않음. 모델 Combinational Circuit Inputs X Outputs Z Output function  디지탈/컴퓨터 서강대학교 전자공학과

Two-level design Multi-level design Digital Logic - 조합 회로 (2) 설계 방식 Two-level design Multi-level design a b c d f a b c d f Area : 9 (#lits) Delay : 2 * g Power : 23.6 W Area : 7 (#lits) Delay : 3 * g (2 *  g in MOS) Power : 17.4 W 디지탈/컴퓨터 서강대학교 전자공학과

Digital Logic - 조합 회로 (3) 구현 방식 응용 Standard cell, Gate array, Sea-of-gates FPGA (Field-Programmable Gate Arrays) PLD (Programmable Logic Device) PLA (Programmable Logic Array) 응용 MUX (Multiplexer) / DEMUX (Demultiplexer) Decoder / Encoder Adder / Subtracter Multiplier / Divider 디지탈/컴퓨터 서강대학교 전자공학과

MUX는 S 값에 따라 입력 중 하나의 값을 선택하여 출력으로 보내는 회로. Digital Logic - 조합 회로 (4) MUX 설계 예제 MUX는 S 값에 따라 입력 중 하나의 값을 선택하여 출력으로 보내는 회로. A B C S Circuit Symbol 진리표 S A B Y 0 0 x 0 0 1 x 1 1 x 0 0 1 x 1 1 구현된 회로 디지탈/컴퓨터 서강대학교 전자공학과

출력은 현재 입력값과 회로의 내부 상태값에 의해 결정 기억 소자를 포함. 모델 Digital Logic - 순차 회로 (1) 특징 출력은 현재 입력값과 회로의 내부 상태값에 의해 결정 기억 소자를 포함. 모델 Memory Comb. Circuit Inputs X Outputs Z Y Output function  next-state function  디지탈/컴퓨터 서강대학교 전자공학과

Mealy Model Moore Model Digital Logic - 순차 회로 (2) 설계 방식 상태 전이표 입력 현재상태 다음상태 출력 0 0 0 0 1 0 1 1 0 1 1 1 1 1 0 0 다이어그램 Mealy Model Moore Model 입력/출력 1 1/1 1/0 0/0 0/1 상태/출력 입력 상태 디지탈/컴퓨터 서강대학교 전자공학과

Digital Logic - 순차 회로 (3) 순차 회로 설계 과정 State behavior specification State minimization State assignment Combinational function specification Combinational circuit design Gate-level circuit 디지탈/컴퓨터 서강대학교 전자공학과

Digital Logic - 순차 회로 (4) 응용 Vending Machine Elevator Controller Traffic Controller System Controllers Processors 디지탈/컴퓨터 서강대학교 전자공학과