The 96 Chann FED Tester: Greg Iles2 September 20031 96 Channel FED Tester Status –Prototype now fully populated with AOHs. –Forced to borrow seven 2-channel.

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Presentation transcript:

The 96 Chann FED Tester: Greg Iles2 September Channel FED Tester Status –Prototype now fully populated with AOHs. –Forced to borrow seven 2-channel AOHs due to late delivery of the AOHs we requested. 17 optical channels instead of 24 Our sixty-four 3- channel AOHs should arrive late Sept. –Optical output of AOHs NOT yet tested !!!

The 96 Chann FED Tester: Greg Iles2 September Temperature Control of AOHs AOH temperature control working at present, but not optimum. –Bottom AOHs -> too cold, top AOHs too hot –Hot air rising inside perspex box. Improve ventilation in perspex box. –Balance between available heating power and cooling effects Some extra heating power possible Insulate backside of PCB Temp sensor measures AOH temperature via thermal bridge Perspex part of AOH support (not visible) insulates it from the PCB Power dissipated here and conducted to AOH via thermal bridge Combined ADC & DAC measures temperature and modulates heating power FPGA measures temperature, performs PID calculation to calculate heating power required I2C bus

The 96 Chann FED Tester: Greg Iles2 September Fibre Mayhem AOHs a very long time ago with 1m of fibre pigtail.... –After 96 chan concept developed (Feb/March) we tried to reduce the fibre pigtail length => Not possible At present we have approx 3x1.5m and 7x2x0.56m = 11.5m In future we will have 24x1m = 24m –The 4 fibre reels doesn’t quite work because of insufficient room for cable and connector insertion. Ad-hoc solutions works for 13m, but is it OK for 24m ? Long-term is this OK ?

The 96 Chann FED Tester: Greg Iles2 September Data from FE0 (Jon ?) Very preliminary data from front-end FPGA –ADC sampling point not correct –2 channels not working...(one saturated, the other at zero) –Need to modify configuration file to drive all 12 channels with the same pattern.

The 96 Chann FED Tester: Greg Iles2 September Data from FE1 (Jon ?) Very preliminary data from front-end FPGA –Again ADC sampling point not correct –1 channels not working...(set at midlevel)

The 96 Chann FED Tester: Greg Iles2 September Conclusions When do we order a further 4 FED Testers ? –It will take 4 weeks for further FED Tester to arrive Remaining 3 FED Testers arrive 2 weeks later –Ideally like to sort out the following first Thermal management of AOHs Fibre optic cable management – Better solutions ??? Understand data arriving at FED –Minor corrections to artwork. Ready to generate artwork files...