Jason O. Trinidad-Pérez Department of Electrical and Computer Engineering Inter American University of Puerto Rico Mentors: Yuriy Pischalnikov and Warren Schappert

 Objectives  Introduction  Hardware  Firmware  Software  Testing  Conclusion  References

 To configure the FPGA for RF cavity simulation.  Create an interface for the FPGA.

 Fermilab uses RF cavities to accelerate particle beams.  To test electronics that control these cavities, simulators are useful.  An FPGA can be used as a simulator.

 XtremeDSP Development Kit-IV: ◦ BenONE-Kit Motherboard  Spartan-II FPGA for PCI or USB interface.  Host interface via PCI or USB.  Status LEDs. ◦ BenADDA DIME-II module:  Virtex-4 user FPGA.  2 independent 14-bits ADCs and DACs.  On board oscillator, support for external clock and programmable clocks.

 Firmware was written in VHDL. ◦ 3 Registers where assigned:  14-bits address register.  32-bits input register.  32-bits output register. ◦ ADC input  Passes ADC input signal into the FPGA. ◦ DAC output  Passes processed signal to the DAC.

 Started with working examples. ◦ ADC to DAC hookup. ◦ Host Interface.  Merged both examples and…

 Lots of errors!!!

 Can’t copy and paste. ◦ Assign pins. ◦ Set clocks. ◦ Other files.

 Implemented difference equations. ◦ Used for simulating many physical systems. ◦ RCL continuous 2 nd order differential equation: ◦ Discrete difference equation:

 Difference equation in VHDL ◦ 32-bits variables ◦ t1 <= (a11*x0) + (a12*x1) + (b1*u0); ◦ t2 <= (a21*x0) + (a22*x1) + (b2*u0); ◦ t3 <= (c1*x0) + (c2*x1); ◦ x0 <= t1(63) & t1(61 downto 32); ◦ x1 <= t1(63) & t2(61 downto 32); ◦ y0 <= t1(63) & t3(61 downto 32);

 Address register ◦ Address register used to specify the variable to be written or read: Address registerVariable 1a 11 2a 12 3a 21 4a 22 5b0b0 6b1b1 7c0c0 8c1c1

 DIMEScript ◦ Interpreted language. ◦ Errors only found when line with error is executed. ◦ Needs FUSE environment, DIMEcontrol application or user application to run script.

 C API ◦ Easier for verifying errors. ◦ Better I/O. ◦ More control over variables.

 MATLAB ◦ C codes as MATLAB functions using MEX-files. ◦ Better interface. ◦ Even more control over variables.

 4 MATLAB functions ◦ Open card  x = opencard ◦ Close card  closecard(x(1), x(2)) ◦ Write register  writereg(x(2),address,number) ◦ Read register  y = readreg(x(2),address)

 Assigned values to the variables: ◦ a = 0 ◦ b = c = ◦ t1 <= (a11*x0) + (a12*x1) + (b1*u0); ◦ t2 <= (a21*x0) + (a22*x1) + (b2*u0); ◦ t3 <= (c1*x0) + (c2*x1); ◦ x0 <= t1(63) & t1(61 downto 32); ◦ x1 <= t1(63) & t2(61 downto 32); ◦ y0 <= t1(63) & t3(61 downto 32);

 Nothing was supposed to happen to the input Input Output

 DAC1_D <= not(not yo(31) & y0(30 downto 18)) Input Output

 Implement a rotation matrix to simulate an RF cavity.

theta= 2*pi/10 lambda =.85 fullscale = 2^31-1 a11= uint32((fullscale)*(lambda)*(cos(theta))) a12= uint32((fullscale)*(lambda)*(sin(theta))) a21= uint32(mod(double(2^32)-double(a12),2^32)); a22= a11; b0 = fullscale*(1-lambda) b1 = 0 c0 = fullscale c1 = 0

 As λ nears 1, sine wave should take more time to decay completely. λ=0.85 λ=0.86

λ=0.863 λ=0.865

λ ≥ 0.865

 The core part of the simulator was successfully configured. ◦ Other components need to be added.  An interface was created in MATLAB to facilitate communication with the board.

 Fermilab ◦ Mentors: Warren Schappert and Yuriy Pischalnikov ◦ David Peterson ◦ Carol Angarola ◦ Technical Department staff ◦ Cafeteria employees  PR-LSAMP

 DIMEScript User Guide. Issue 3. 22/02/2005 Nallatech Limited.  FUSE C/C++ API Overview. Issue 8. 17/01/2005 Nallatech Limited.  XtremeDSP Development Kit-IV User Guide. Issue 1. 01/04/2005 Nallatech Limited.  MEX-files Guide. notes/1600/1605.html#intro  C++ with Matlab Tutorial. Oct  MEX-File Programming for Image Processing Using DIPimage May, Luengo, C. L. ftp://ftp.qi.tnw.tudelft.nl/pub/DIPlib/Download/docs/mex_file_prog ramming.pdf