1 Digital Logic Design (41-135) Chapter 6 Combinational Circuit Building Blocks Younglok Kim Dept. of Electrical Engineering Sogang University Spring 2006

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 2 Chapter Objectives Multiplexers Combinational subcircuits Encoding & decoding

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 3 2-to-1 Multiplexer f s w 0 w 1 (c) Sum-of-products circuit (b) Truth table 0 1 f s w 0 w 1 (d) Circuit with transmission gates w 0 w 1 f s (a) Graphical symbol f s w 0 w 1 0 1

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 4 4-to-1 Multiplexer (b) Truth table w 0 w 1 f s 1 w 0 w s 0 w 2 w fs 1 0 s 0 w 2 w 3 (c) Circuit (a) Graphic symbol f s 1 w 0 w 1 s 0 w 2 w 3

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 5 Larger Multiplexers 0 w 0 w w 2 w f 0 1 s 1 s w 8 w 11 s 1 w 0 s 0 w 3 w 4 w 7 w 12 w 15 s 3 s 2 f (a) 4-to-1 multiplexer(b) 16-to-1 multiplexer

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 6 Applications of Multiplexers: Crossbars x x s y 1 y 2 (a) 2x2 crossbar switch (b) Implementation using multiplexers x 1 x 2 y 1 y 2 s

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 7 Programmable Switch of FPGA (a) A FPGA cell (b) Implementation using pass transistors (c) Implementation using multiplexers Storage cell built by several TRs  Larger size

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 8 Synthesis of Logic Functions: XOR (a) Implementation using a 4-to-1 multiplexer f w w fw 1 0 w (b) Modification fw 1 0 w f w 1 w 2 w 2 f w 2 w 1

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 9 3-Input Majority Function (a) Modified truth table (b) Circuit w 3 w fw 1 0 w w 1 w 2 w 3 f f w 1 0 w 2 1 w 3 Output is true/false when a majority of inputs are true/false, respectively.

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 10 3-input XOR with 2-to-1 Multiplexers (a) Truth table w 1 w 2 w 3 f w 2 w 3  w 2 w 3  (b) Circuit f w 3 w 1 w 2

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 11 3-input XOR with 4-to-1 Multiplexers (a) Truth table (b) Circuit w 1 w 2 w 3 f w 3 w 3 w 3 w f w 1 w 2 w 3 3

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 12 Shannon’s Expansion Theorem Any Boolean function can be written in the form Where cofactors are written by The complexity may vary depending on the choice of i

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 13 Multiplier Synthesis (b) Circuit w 1 w 2 w 3 f f w 1 w 2 w 3 w 2 w 3 + (a) Truth table f w 3 w 1 w 2

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 14 Examples 3-input majority function Example for

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 15 Expansion with Two Variables By using

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 16 Examples 6.6 (a) Using a 2-to-1 multiplexer (b) Using a 4-to-1 multiplexer

Digital Logic Design Ch.6 Combinational Circuit Building Blocks 17 Example Input Majority Function w 2 0 w 3 1 f w 1