Digital Sound Projection ECE 477 Group 6 Design Constraint Analysis Steve Anderson Mike Goldfarb Shao-Fu Shih Josh Smith

Project-Specific Success Criteria 1.An ability to wirelessly transmit and receive a digital audio signal. 2.An ability to display information to the user on an LCD about the status of the device. 3.An ability to apply digital mute to the audio signals based on a noise threshold. 4.An ability to allow the user to adjust EQ effects applied to audio signals. 5.An ability to control output volume wirelessly from the transmitter. 2

Transmitter Block Diagram 3

Receiver Block Diagram 4

Design Constraints Digital Signal Processor Selection Speed and Memory Requirements Flexible I/O ADC/DAC Selection High SNR, Low THD Wireless transmitter Needs to be I2S capable Microcontrollers SPI GPIO 5

Digital Signal Processor ADSP (SHARC) –Maximum 200Mhz, 1200 MFLOPS –2Mbits on-chip RAM –I/O Processor with signal routing unit Six serial ports, 20 GPIO, configurable TI TMS320C6711D –Maximum 250Mhz, 1500 MFLOPS –512Kbits on-chip RAM –Two serial ports, five GPIO 6

ADC and DAC TI PCM1792A DAC –127 dB dynamic range –-108 dB THD –2 channels TI PCM4222 ADC –121 dB dynamic range –-108 dB THD –2 channels AD1936 Codec –109 dB dynamic range on DAC –107 dB dynamic range on ADC –-98 dB THD –4 DAC channels –8 ADC channels 7

Component Selection ADSP More memory, just as fast Signal routing unit is attractive Availability of development kit in lab PCM1792A DAC + PCM4222 ADC –Better performance on individual components –Don’t need so many channels 8