Implementation of Pong over VGA on the Nexys 4 FPGA EECS 443: Digital Systems Design Final Project Presentation Austin Cosner and David Easley 5/3/2016

Presentation Overview Project Introduction VGA Tutorial Project Implementation Project Demo Wrap-Up

Project Introduction Project Objective Advantages of Pong Game using VGA Advantages of Pong Easy Implementation Rectangular Objects Basic Physics

VGA Tutorial Basic VGA Components H Sync (Horizontal Sync) V Sync (Vertical Sync) Colors On the Nexys 4 Board 4 bits per color RGB

VGA Tutorial H Sync and V Sync Signal Explanation

VGA Tutorial Sync Signal Components Sync Pulse Back Porch Front Porch Visible Display Area

VGA Tutorial RGB Signal Explanation 4 bits for each RGB Component 12 bit Color total 4096 Color Combinations Creates a Voltage 0V to 0.7V Color is sampled per pixel

VGA Tutorial Timing Example (800x600@60 Hz)

Project Implementation 7 Modules

Project Implementation (G1 : CLK Wiz) Module 1 : Clocking Wizard Xilinx IP Found in IP Catalog Operation 100 MHz => 40 MHz Generate Pixel Clock

Project Implementation (G2 : VGA Contr.) Module 2 : VGA Controller Custom Design Backbone Module Operation Create H Sync, V Sync and Video On Signals Generate Signals and Pixel Counters

Project Implementation (G2 : VGA Contr.) Main Process 2 Counters Horizontal Counter Range 0 to 1055 Vertical Counter Range 0 to 627 Horizontal Visible 216 to 1016 Vertical Visible 29 to 629

Project Implementation (G3 : Pixel Gen.) Module 3 : Pixel Generator Custom Design Backbone Module Operation Generate RGB Signals Generate RGB Signals based on VGA Controller Counters

Project Implementation (G3 : Pixel Gen.) Object Drawing While the current pixel being drawn is within the bounds of an object, set that object to the “on” state Constants (for permanent bounds) and signals (for movement)

Project Implementation (G3 : Pixel Gen.) Color Selection Processes Decisions made on a per-pixel basis Aligned with the VGA clock With-select-when dependent on what pixel is currently in question

Project Implementation (G3 : Pixel Gen.) Paddle Movement Reset to middle of side Button press sends paddle up/down Paddle movement signals used in ball reflection

Project Implementation (G3 : Pixel Gen.) Ball Movement Reset to center, starting velocity randomized (see random generator later) Next state logic advancement at beginning of process iteration

Project Implementation (G3 : Pixel Gen.) Ball Movement ctd. Result of ball impact on paddle varies on paddle movement Same direction movement = higher velocity ball Opposite direction slows and changes ball’s vertical movement

Project Implementation (G3 : Pixel Gen.) Ball Movement ctd. Ball reflects off of the screen bounds and the wall based on current position

Project Implementation (G3 : Pixel Gen.) Ball Movement ctd. Prevent ball’s next position from going through the paddle or wall

Project Implementation (G4 : CLK Divider) Module 4 : Clock Divider Custom Design Support Module Operation Create the Animation Clock Used in: Paddle/Ball Movement

Project Implementation (G4 : CLK Divider) Main Process Simple Counter Generic Input Argument Max Count Val 50% Duty Cycle Count to Half

Project Implementation (G5 : State Mach.) Module 5 : State Machine Contrl. Custom Design Backbone Module Operation Control the Game State and Internal Signals Used in: Scorekeeping Object Reset

Project Implementation (G5 : State Mach.) Basic State Diagram Simple FSM, only three states Returns to idle state upon reset signal Point scored during game adds to count and returns to idle

Project Implementation (G5 : State Mach.) Main Process Basic case statement State iteration through conditional signal assignment

Project Implementation (G6 : 7-Seg Contr.) Module 6 : 7-Segment Controller Custom Design Support Module Operation Display the Score for the game on the 7-Segments Used in: Score Counter Output

Project Implementation (G6 : 7-Seg Contr.) Main Process With...Select MUX Build Cathode String Hardcoded Anode String

Project Implementation (G7 : RNG) Module 7 : Random Number Gen. Custom Design Support Module Operation Create 2 pseudo-random numbers Used in: Velocity variation

Project Implementation (G7 : RNG) Two Processes Each process is triggered off of a different VGA clock Pseudo random at its finest Two counters for 6 states (0-5) Mapped to speeds via with-select-when statements

Project Demo

Wrap-Up Future Work/Improvements 2 players Round Ball Variable Speed Improved Input Display Buffer

Wrap-Up Thanks for listening! Questions?