Digital Circuits Design Chin-Sung Lin Eleanor Roosevelt High School
Digital Circuits Design From Logic Gates to Boolean Functions From Boolean Functions to Truth Tables From Truth Tables to Logic Gates (Sum-of-Products) Logic Circuits Simulation Properties of AND and OR Gates Properties of NAND and NOR Gates Digital Logic Circuits Implementation Digital Building Blocks
From Logic Gates to Boolean Functions
From Logic Gates to Boolean Functions
A + B OR
From Logic Gates to Boolean Functions Y = C (A + B) A + B AN D OR
From Logic Gates to Boolean Functions
A B AN D
From Logic Gates to Boolean Functions Y = C + A B A B OR AN D
From Logic Gates to Boolean Functions
A B AN D
From Logic Gates to Boolean Functions A B AN D C D
From Logic Gates to Boolean Functions Y = A B + C D A B OR AN D C D
From Logic Gates to Boolean Functions
Y = A B + C D A B OR AN D C D B C
From Logic Gates to Boolean Functions
Y = A B C + A B C + B C D A B C OR AN D B C A B C B C D
From Boolean Functions to Truth Tables
From Boolean Functions to Truth Tables Y = C + A B A B OR AN D
From Boolean Functions to Truth Tables Y = C + A B A B OR AN D ABCY
From Boolean Functions to Truth Tables Y = C + A B A B OR AN D ABCY
From Boolean Functions to Truth Tables Y = C + A B A B OR AN D ABCY
From Boolean Functions to Truth Tables Y = A B + C D
From Boolean Functions to Truth Tables Y = A B + C D ABCDY A B OR AN D C D
From Boolean Functions to Truth Tables Y = A B + C D ABCDY A B OR AN D C D
From Boolean Functions to Truth Tables Y = A B + A B ABY
From Boolean Functions to Truth Tables Y = A B + A B ABY
From Boolean Functions to Truth Tables Y = A B C + A B C ABCY
From Boolean Functions to Truth Tables Y = A B C + A B C ABCY
From Boolean Functions to Truth Tables Y = A B C + A B C ABCY
From Boolean Functions to Truth Tables ABCY Y = A B C + A B C
From Truth Tables to Logic Gates
From Truth Tables to Logic Gates (Sum of Products) ABY Y = A B + A B Product Sum of Products (SOP)
From Truth Tables to Logic Gates (Sum of Products) ABCDY
Y = A B + C D ABCDY A B OR AN D C D
From Truth Tables to Logic Gates (Sum of Products) ABCY Y = A B C + A B C + A B C + A B C + A B C
From Truth Tables to Logic Gates (Sum of Products) ABCY Y = C + A B Y = A B C + A B C + A B C + A B C + A B C Y = A B C + A B C + A B C + A B C + A B C + A B C Y = (A B C + A B C) + (A B C + A B C) + (A B C + A B C) Y = A C (B + B) + A B (C + C) + A C (B + B) Y = A C + A B + A C Y = A C + A C + A B Y = (A + A) C + A B A B OR AND
From Truth Tables to Logic Gates (Sum of Products) ABCY Y = A B C + A B C + A B C + A B C + A B C A B OR AND Y = C + A B Logic Simplification Is there a better way?
Logic Simplification (Karnaugh Map, K-Map)
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C K-Map Karnaugh Map (K-Map) is a graphical tool for simplifying Boolean functions Coordinates of each cell are the input variables, which are ordered in Gray code to ensure that only one variable changes between adjacent cells Each cell represents a row in the truth table The number of cells is always a power of 2
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C K-Map Load the cell values from the truth table
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C K-Map Load the cell values from the truth table
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C K-Map Load the cell values from the truth table Group adjacent cells with 1’s into pairs, quad, and octet (powers of 2)
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C K-Map Load the cell values from the truth table Group adjacent cells with 1’s into pairs, quad, and octet (powers of 2)
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C K-Map Load the cell values from the truth table Group adjacent cells with 1’s into pairs, quad, and octet (powers of 2) A cell can be grouped more than once All cells need to be grouped if possible Group cells around the outer edge of the map Find the sum of these groups
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C K-Map
Logic Simplification (Karnaugh Map, K-Map) ABCY AB C Y = A B + C A B OR AND K-Map
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map Y = A B + C D A B OR AND C D
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map Y = A B D + B D
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map
Logic Simplification (Karnaugh Map, K-Map) ABCDY AB CD K-Map Y = B D + B D + AC = (B D) + AC
Properties of AND and OR Gates
Properties of AND Gates Enabl e XY 0X0 1XX Any zero input of AND gate will zero the output One of the inputs of AND gate can be used as Enable pin When Enable is ‘1’, Y = X When Enable is ‘0’, Y = 0 Enabl e XY
Properties of AND Gates SelectABY 0ABB 1ABA 2-to-1 Multiplexer Select pin used to enable one of the AND gates When Select is ‘1’, Y = A When Select is ‘0’, Y = B SelectABY
Properties of OR Gates DisableXY 0XX 1X1 Any ‘1’ input of OR gate will make the output equal to ‘1” One of the inputs of OR gate can be used as Disable pin When Disable is ‘1’, Y = 1 When Disable is ‘0’, Y = X DisableXY
Properties of NAND and NOR Gates
Any Boolean function can be implemented by a combination of AND, OR, or NOT functions. Any Boolean function can be implemented using only NAND gates. Any Boolean function can be implemented using only NOR gates.
Universal Property of NAND Gates Any Boolean function can be implemented using only NAND gates. OR NOT AND De Morgan’s laws NAND: x · y = x + y
Universal Property of NOR Gates Any Boolean function can be implemented using only NOR gates. OR NOT AND De Morgan’s laws NOR: x + y = x · y
Digital Logic Circuits Implementation
Half Adder
Half-Adder Example Select A B Y Half Adder Half Adder A B C S 0 1+ ) A B C S A B C S A B C S A B C S
Half-Adder Example Select A B Y ABCS Half Adder Half Adder A B C S
Half-Adder Example Select A B Y ABCS Half Adder Half Adder A B C S
Half-Adder Example Select A B Y ABCS Half Adder Half Adder A B C S
Half-Adder Example Select A B Y S = ~AB + A~B = A B C = AB ABCS
Half-Adder Example Select A B Y Half Adder Half Adder A B C S
Full Adder
Full-Adder Example Select A B Y )
Full-Adder Example Select A B Y )
Full-Adder Example Select A B Y ) A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B
Full-Adder Example Select A B Y ) A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 S0S0 S1S1 S2S2 S3S
Full-Adder Example Select A B Y ) A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 S0S0 S1S1 S2S2 S3S3 C in C i C o C o
Full-Adder Example Select A B Y ) A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 S0S0 S1S1 S2S2 S3S3 C in C i C o C o
Full-Adder Example Select A B Y ) A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 S0S0 S1S1 S2S2 S3S3 C i/o FA C i/o CiCi CoCo
Full-Adder Example Select A B Y A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 S0S0 S1S1 S2S2 S3S3 C i/o FA C i/o CiCi CoCo A B S FA CoCo CiCi Full Adder
Full-Adder Example Select A B Y CiCi ABCoCo S A B S FA CoCo CiCi Full Adder
Full-Adder Example Select A B Y CiCi ABCoCo S A B S FA CoCo CiCi Full Adder
Full-Adder Example Select A B Y CiCi ABCoCo S A B S FA CoCo CiCi Full Adder
Full-Adder Example Select A B Y CiCi ABCoCo S C i A\B K-Map C o = AB + C i A + C i B Boolean Function
Full-Adder Example Select A B Y C o = AB + C i A + C i B
Full-Adder Example Select A B Y CiCi ABCoCo S C i A\B K-Map S = ~C i ~AB + ~C i A~B + C i AB + C i ~A~B Boolean Function
Full-Adder Example Select A B Y S = ~C i ~AB + ~C i A~B + C i AB + C i ~A~B
Full-Adder Example Select A B Y S = ~C i ~AB + ~C i A~B + C i AB + C i ~A~B = ~C i (A B) + C i ~(A B) = C i A B
Full-Adder Example Select A B Y A B S FA CoCo CiCi Full Adder
Full-Adder Example Select A B Y A B S FA CoCo CiCi Full Adder
Full-Adder Example Select A B Y A3A3 B3B3 S 3 FA CoCo CiCi 4-Bit Full Adder A2A2 B2B2 S 2 FA CoCo CiCi A1A1 B1B1 S 1 FA CoCo CiCi A0A0 B0B0 S 0 FA CoCo CiCi
Full-Adder Example Select A B Y A3A3 B3B3 S 3 FA CoCo CiCi 4-Bit Full Adder A2A2 B2B2 S 2 FA CoCo CiCi A1A1 B1B1 S 1 FA CoCo CiCi A0A0 B0B0 S 0 FA CoCo CiCi 4-Bit Full Adder
Full-Adder Example Select A B Y Bit Full Adder
Logic Circuits Synthesis
Digital Building Blocks
Select A B Y
Arithmetic Logic Unit (ALU) Select A B Y OPCODE Operands
Instruction Format Select A B Y
Central Processing Unit (CPU) Select A B Y
Central Processing Unit (CPU) Select A B Y OPCODE Operands Program
Computational Thinking through Digital Hardware
Reflections on Lessons Binary number system has been adopted as the machine language (it can do everything the decimal system did). Digitization & quantization methods can convert all the real- world information into binary data. Digital computer hardware are made of millions/billions of switches (which have only binary states: 1 & 0). Logic gates (which are made of switches) form the basic building blocks of digital logic circuits. Logic circuits can perform arithmetic, logic, and data flow control functions on binary data. Building a “thinking machine” purely in hardware.
Q & A