Lepton-Photon 2009, Hamburg, August 18, Valerio Re - INFN Organization of Monolithic and Vertically Integrated Pixel Sensor R&D in the High Energy Physics Community: the VIPS group

Lepton-Photon 2009, Hamburg, August 18, Introduction R&D on monolithic and vertically integrated pixel sensors has to provide devices that meet very different and very demanding specifications Collaborations and Consortia are already operating in the field of pixel R&D, such as 3D-IC (FNAL) and OKI-SOI (KEK, see next talk). They can offer good examples of how the HEP community could deal with emerging applications and technologies A facilitation group for monolithic and vertically integrated pixel sensors (VIPS) was established and supported by regional HEP directors

Lepton-Photon 2009, Hamburg, August 18, Monolithic and vertically integrated pixel systems Merging of different technologies and skills IC design (analog and digital) Sensors Interconnections System issues (e.g. cooling) Specifications may substantially vary in different applications HEP Vertex Trackers (ILC, LHC upgrades and SLHC, Super B- Factories, others) Photon science (advanced sources) Medical imaging

Lepton-Photon 2009, Hamburg, August 18, Pixel R&D strategies Improve electronics performance:  put more intelligence on the chip, and possibly on the pixel itself (handling of high data rates, analog-to digital conversion, sparsification,…) Improve sensor performance:  improve the quality of the sensor substrate and the charge collecting properties of sensing electrodes (increase efficiency, collected charge and signal-to- noise ratio, improve radiation tolerance,…)  reduce pixel pitch for a better resolution (without giving up electronic functionalities)

Lepton-Photon 2009, Hamburg, August 18, The need of small pixel pitch ( ≤ 20  m for ILC, ≤ 50  m for SLHC) with advanced integrated functions, together with the progress of microelectronic industry, is going to push towards using CMOS technologies in the 100 nm region and beyond. These are very complex in terms of process options, libraries, software tools,…For a new user, it takes a considerable effort to acquire even a basic knowledge. For a single group, it will be probably difficult to afford many prototyping runs. For the interconnection with sensors, full CMOS wafers are usually needed at a certain stage. Again, because of high prices, it is difficult to afford engineering runs. It is often unclear how pads for interconnection with sensors should be designed. This requires an interaction between IC design rules and interconnection requirements Interdisciplinary knowledge: CMOS design

Lepton-Photon 2009, Hamburg, August 18, Interdisciplinary knowledge: high resistivity sensors and interconnections There are several vendors providing sensors to the community. Again, duplication of efforts could be avoided. There may be tricky technical details concerning the interconnection of the sensors to the readout electronics that affect sensor processing and design. Interconnections is probably the area where more diverse technologies are available or are being developed by industry, from standard bump bonding to the various flavours of vertical integration. Each technology will define different sets of requirements and specifications on the sensors.

Lepton-Photon 2009, Hamburg, August 18, The 3D-IC Consortium The development of 3D vertically integrated electronics and sensors is a challenge for high energy physics applications. To cope with the cost of engineering runs and to share efforts and experience in the design of vertically integrated devices, the community has organized itself in consortia among worldwide research institutions. The 3D-IC Consortium promoted by Fermi National Accelerator Laboratory and which currently has 17 international partners, is one example of such an organization. This Consortium, as a first step, is going to investigate 3D devices based on two layers (“tiers”) of the 130 nm CMOS technology by Chartered Semiconductor, vertically integrated with the Tezzaron interconnection technology. In the framework of this Consortium, it was possible to gather a pool of physicists and IC designers with the critical mass, competence and willingness to share knowledge that is necessary for such an ambitious enterprise.

Lepton-Photon 2009, Hamburg, August 18, Ray Yarema (FNAL), 2009 Pisa Meeting

Lepton-Photon 2009, Hamburg, August 18, Use vertical integration technology to interconnect two 130nm CMOS layers 1 st wafer 2 nd wafer WB/BB pad TSV Inter-tier bond pads Fabrication of 2-tier devices with the Tezzaron Chartered process

Lepton-Photon 2009, Hamburg, August 18, Ray Yarema (FNAL), 2009 Pisa Meeting

Lepton-Photon 2009, Hamburg, August 18,

Lepton-Photon 2009, Hamburg, August 18, Device architectures in the 3D-IC Consortium MPW run: 1) From 2D to 3D CMOS pixel sensors Analog section Digital section DNW sensor P-well N-well NMOS PMOS Digital section DNW sensor Analog section Guideline: separate analog from digital section to minimize cross-talk between digital blocks and sensor/analog circuits, reduce pixel size, improve charge collection,… Tier 1: collecting electrode and analog front-end and discriminator Tier 2: digital front-end (A/D converter, latches for hit storage, pixel-level digital blocks for sparsification, time stamp registers, kill mask, …) and digital back-end (X and Y registers, time stamp line drivers, serializer,…..)

Lepton-Photon 2009, Hamburg, August 18, Device architectures in the 3D-IC Consortium MPW run: 2) 3D readout integrated circuits interconnected to high resistivity sensors Analog section Digital section detector layer Bump bonding 1 st layer 2nd layer Analog section Digital section Wafer bonding 1 st layer 2nd layer detector layer Conventional solder bumps or CuSn can pose a problem for low mass fine pitch assemblies IC bonding to a detector will be done by Ziptronix using the Direct Bond Interconnect (DBI) process. –Xo < 0.001%

Lepton-Photon 2009, Hamburg, August 18, Another example of 3D vertical integration activities MPI Munich: 3D interconnection for sLHC R&D goals: Test thin detectors (less trapping, rad hard) Thinning of r/o chips Practice SLID and ICV SLID as alternative to bump bonding (lower costs?) Vias to achieve 4-side buttable ASICs (material reduction) Build demonstrator using ATLAS pixel chip (FEI2) and thin (75/150  m) pixel sensors made by MPI (single chip module)

Lepton-Photon 2009, Hamburg, August 18, MPI Munich: 3D interconnection for sLHC Thin pixel sensors on SOI produced  Irradiation tests  Test with SLID interconnection SLID tests on special dummies -Good yield! -Good alignment  Proceed with SLID connection of real sensor ans ASIC  Via etching and SLID SLID by Fraunhofer IZM Dummy chip with test connection Inter chip vias by IZM

Lepton-Photon 2009, Hamburg, August 18, Bonn University: An ATLAS pixel module concept with TSV Description: TSV for all signals and power of the FE. The signals are rerouted on the FE backside  Much reduced Flex surface (1 for power only, 1 for signal IO). No pigtail. Cooling structure in direct thermal contact with the sensor. Can use Flip-Chip techniques instead of wire- bonds. Pros: Simple Flex on back-side: Good Flex accessibility. Reduced material. Cooling structure can run to the edge of the sensor. Mounting: thicker Si towards the structure. Possible to expand sensor coverage to provide 100% coverage at module level. Cons: HV connection to be improved. Structured back- side of FE-chips needed FE-Chip TSV Cooling structure HV Glue joint Sensor Small power Flex components Power bus rerouting on FE backside Sensor “extension ”

Lepton-Photon 2009, Hamburg, August 18, Marcel Demarteau – FNAL Junji Haba – KEK Hans-Günther Moser - MPI Valerio Re - INFN Facilitation Group for Monolithic and Vertically Integrated Pixel Sensors R&D (VIPS) To provide additional service to existing and emerging collaborations and to enable quicker and more efficient development of pixel detector technologies for particle physics, earlier this year HEP regional directors established a facilitation group for monolithic and vertically integrated pixel detector R&D.

Lepton-Photon 2009, Hamburg, August 18, VIPS tasks Investigate the expectations and needs of the HEP monolithic and vertically integrated pixel community, investigate the needs of other scientific communities interested in these technologies and investigate the development of these technologies for applications other than particle physics Foster collaboration across different pixel R&D groups to facilitate the development of these new and promising technologies for high energy physics applications by providing means of networking and exchange of information between groups. The facilitation group will not direct the effort and direction of individual R&D projects.

Lepton-Photon 2009, Hamburg, August 18, VIPS tasks Through the development of an effective network between R&D collaborations working in this field, by establishing and coordinating contacts to foundries, research institutes and industry, the group will provide an additional service to the community that will facilitate and expedite the development of these new technologies. Areas that are being explored are opportunities for funding, shared and common infrastructure for testing, offering successful implementations of new technologies to the community at large and, of course, facilitate ways in which members can meet and exchange information.

Lepton-Photon 2009, Hamburg, August 18, VIPS activities Organize and support regional funding proposals (e.g. European FP7, see next talk): could they benefit from a global support? Plans for a workshop on 3D vertical integration end of 2009 – first months of 2010 Presentation at IEEE 3D IC in San Francisco, September

Lepton-Photon 2009, Hamburg, August 18, Advanced microelectronic technologies provide exciting opportunities and have the potential for a performance breakthrough with respect to present MAPS and hybrid pixels A lot of work is needed to qualify these technologies for actual experiments The Facilitation Group is ready to help in ways that ultimately will have to be defined by the community The three regional directors are very supportive of the Facilitation Group and are ready to offer their help to ensure this initiative is successful Conclusions

Lepton-Photon 2009, Hamburg, August 18, Backup slides

Lepton-Photon 2009, Hamburg, August 18, Pixel systems requirements for HEP vertexing applications Physics goals set severe requirements: –High granularity  small pixel pitch –Low material budget  low mass cooling, thin silicon wafers, small amount of material for support and interconnections –Small distance to interaction point  large background radiation hardness (deep submicron CMOS intrinsically rad-hard) High data rate, Level 1 trigger Data sparsification Mixed-signal chips Full CMOS In MAPS, loss of efficiency due to in-pixel PMOS Digital-to-analog interferences