I NTEL 8086 M icroprocessor بسم الله الرحمن الرحيم 1

8086 Memory Segmentation Instruction Set Assembly Language 8086 Addressing Modes First Assembly Program Assembly: Step by Step 2

3  Introduction  Memory Interface  8086 Microprocessor  8086 Registers  8086 Addressing Modes  8086 Instruction Set  Assembly Program Examples

4  The 8086 was Intel’s first 16-bit microprocessor  This means that the 8086 has a 16-bit ALU. The 8086 contains 20 address pins  Therefore, it has a main (directly addressable) memory of 1 megabyte (2 20 bytes)

5  The 8086 was Intel’s first 16-bit microprocessor. This means that the 8086 has a 16-bit ALU  The 8086 contains 20 address pins  It has a main (directly addressable) memory of 1 megabyte (2 20 bytes)

6  The 16-bit word at the even address is A  The 16-bit word stored at the odd address is 462E3 16

7  The 8086 always reads a 16-bit word from memory  This means that a word instruction accessing a word starting at an even address can perform its function with one memory read

8  A word instruction starting at an odd address, however, must perform two memory accesses to two consecutive memory even addresses, discarding the unwanted bytes of each

9  For byte read starting at odd address N, the byte at the previous even address N – 1 is also accessed but discarded  Similarly, for byte read starting at even address N, the byte with odd address N + 1 is also accessed but discarded

10  The 8086 systems have two “ 0.5 Mega x 8 bit” memory banks  Data-bytes associated with even-addresses reside in low bank and odd-address reside in high bank  Address pins A 1 to A 19 selects the storage locations, whereas A0 and BHE’ pins are used to enable high or low memory banks

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17  A word instruction accessing a word starting at an even address can perform its function with one memory read  A word instruction starting at an odd address, however, must perform two memory accesses to two consecutive memory even addresses

18  In a 8086-based microcomputer, Identify each of the following instructions as aligned or misaligned transfer for 16-bit memory  Briefly explain for each case how data will be transferred via which data pins (D15 - D0) using A0 and BHE’ control pin

19  MOV AH, [1015H]  MOV BL, [1020H]  MOV BX, [0077H]  MOV CX, [0156H]

20  For the 8086, register names followed by the letters X, H, or L in an instruction for data transfer between register and memory specify whether the transfer is 16-bit or 8- bit

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23  The 8086 is packaged in a 40-pin chip. A single +5 V power supply is required  The clock input signal is generated by the 8284 clock generator driver chip  Instruction execution times vary between 2 and 30 clock cycles

24  The 8086 family consists of two types of 16-bit microprocessors, the 8086 and 8088  The main difference is how the processors communicate with the outside world  The 8088 will have to do two READ operations to read a 16-bit word from memory

25  The 8086 uses a segmented memory  There are some advantages to working with the segmented memory  First, the 8086 has to deal with only 16-bit effective addresses  Second, because of memory segmentation, the 8086 can be effectively used in time- shared systems

26  For example, in a time-shared system, several users may share one Suppose that the 8086 works with one user’s program for, say, 5 milliseconds  Segmentation makes it easy to switch from one user program to another

27  The 8086’s main memory can be divided into 16 segments of 64K bytes each (16 x 64 KB = 1 MB)  A segment may contain codes or data  The 8086 uses 16-bit registers to address segments

28  The 8086 includes on-chip hardware to map or translate the two 16-bit components of a memory address into a 20-bit address called a “physical address”  Note that the 8086 contains 20 address pins, so the physical address size is 20 bits wide

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31  The 8086 is divided internally into two independent units: the bus interface unit (BIU) and the execution unit (EU). The BIU reads (fetches) instructions, reads operands, and writes results  The EU executes instructions already fetched by the BIU

32  The 8086 prefetches up to 6 instruction bytes from external memory into a FIFO (first-in-first-out) memory in the BIU and queues them in order to speed up instruction execution  The BIU contains a dedicated adder to produce the 20-bit address

33  The bus control logic of the BIU generates all the bus control signals, such as the READ and WRITE signals  The BIU also has four 16-bit segment registers: the code segment (CS), data segment (DS), stack segment (SS), and extra segment (ES) registers

34  All program instructions must be located in main memory, pointed to by the 16-bit CS register with a 16-bit offset contained in the 16-bit instruction pointer (IP)  Note that immediate data are considered as part of the code segment

35  The 20-bit physical stack address is calculated from the SS and SP for stack instructions such as PUSH and POP  The programmer can create a programmer’s stack with the BP instead of the SP for accessing the stack using the based addressing mode

36  The DS register points to the current data segment; operands for most instructions are fetched from this segment  The 16-bit contents of a register such as the SI or DI or a 16-bit displacement are used as offsets for computing the 20-bit physical address

37  The ES register points to the extra segment in which data is stored  String instructions always use the ES and DI to determine the 20-bit physical address for the destination  The segments can be contiguous, partially overlapped, fully overlapped, or disjointed

38  Every segment must start on 16-byte memory boundaries  Typical examples physical addresses starting at , , , ,...  A physical memory location may be mapped into one or more logical segments

39  A segment can be pointed to by more than one segment register  For example, the DS and ES may point to the same segment in memory

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42  The EU decodes and executes instructions  It has a 16-bit ALU for performing arithmetic and logic operations  The EU has nine 16-bit registers: AX, BX, CX, DX, SP, BP, SI, and DI, and the flag register

43  The 8086 has 12 addressing modes, which can be classified into five groups:  Register and immediate modes  Memory addressing modes (six modes)  Port addressing mode (two modes)  Relative addressing mode (one mode)  Implied addressing mode (one mode)

 Register Mode: MOV AX, BX MOV AH, BL  Immediate Mode: MOV CX, 5062H 44

 Memory Direct Addressing Mode: MOV BX, [1875H] MOV [1257H], CX  Register Indirect Addressing Mode: MOV CX, [BX] 45

 Based Addressing Mode:  MOV AX, 4 [ BX ]  MOV -4 [BP], BX  The segment register is DS or SS  The content of BX or BP is unchanged 46

 Indexed Addressing Mode:  The effective address is calculated from the sum of a displacement value and the contents of register SI or DI  For example, MOV AX, VALUE [ SI ] 47

 Based Indexed Addressing Mode:  The effective address is computed from the sum of a base register (BX or BP), an index register (SI or DI), and a displacement  For example, MOV AX, 4 [ BX ] [ S I ] 48

 String Addressing Mode:  This mode uses index registers  SI is assumed to point to the first byte or word of the source string, and DI is assumed to point to the first byte or word of the destination when a string instruction is executed 49

 The SI or DI is automatically incremented or decremented to point to the next byte or word depending on DF  The default segment register for source is DS, and it may be overridden; the segment register used for the destination must be ES, and can not be overridden 50

 An example is: MOVS WORD  If (DF) = 0, (DS) = 3000H, (SI) = 0020H, (ES) 5000H, (DI) = 0040H, (30020) = 30H, (30021) = 05H, (50040) = 06H, and (50041) = 20H  After this MOVS, (50040) = 30H, (50041) = 05H, (SI) = 0022H, and (DI) = 0042H 51

 Two I/O port addressing modes can be used: direct port and indirect port addressing  In either case, 8- or 16-bit I/O transfers must take place via AL or AX respectively IN AL, 02- IN AL, DX OUT 25, AL - OUT DX, AL 52

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 ADD a, b  ADC a, b  SUB a, b  SBB a, b  DEC reg/mem  NEG reg/mem  CMP a, b 55

 MUL reg/mem  IMUL reg/mem  DIV reg/mem  IDIV reg/mem  CBW  CWD 56

 NOT mem/reg  AND a, b  OR a, b  XOR a, b  TEST a, b 57

 SHL mem/reg, CNT  SHR Mem/reg, CNT  ROL mem/reg, CNT  ROR mem/reg, CNT  RCL mem/reg, CNT  RCR mem/reg, CNT 58

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 What is the difference between MOV AX, [1200], MOV AX, 1200, and MOV [1200], AX?  Initialize register CL to the value 3EH and memory location 43H to the value 55D, and write a program to exchange their contents 61

 Write a 8086 assembly program to add AX and BX and store the result in CX register  Write a 8086 assembly program to add AH and CL registers, and store the result in memory location 1040H 62

 Write an assembly program to find the larger of two unsigned numbers stored in DX and BP registers and store the result in AX register 63

 Write an assembly program to find the smaller of two signed numbers stored in DL register and memory location 120H, and store the result in DH register 64

 Write an assembly program to multiply an unsigned number stored in BX register by 8 without using MUL instruction (use shift instructions) 65

 Write a 8086 assembly program to clear 10 consecutive bytes of memory starting at offset TABLE  Write a 8086 assembly program to initialize 10 consecutive bytes of memory starting at offset TABLE with the value 44H 66

 Write a 8086 assembly program to find the maximum value of a string of 10 unsigned 8-bit numbers  Assume that offset TABLE contains the first number 67

 Write a 8086 assembly program to find the minimum value of a string of 10 signed 8- bit numbers  Assume that offset TABLE contains the first number 68